AM4376: Controlling GPIO from User space /sys/class/gpio

Piyush Ghatole

Part Number: AM4376

Hello,

I am working on a project based on the AM4376 + RT Linux, we have our own custom hardware board,

we successfully ported Uboot and RT kernel, next i tried to control GPIO from user space (/sys/class/gpio), i can control most of all available/free GPIOs, but i am facing problem to control GPIO0[3] and GPIO0[27].

I checked the DTS file for the pin defination entry in any node, but no where it is defined.

Using the command line I checked gpio info and it is showing "sysfs" "output" but control actions (High,Low) not reflecting on GPIOs.

Please find the attached output of 'gpioinfo' command.

I also checked hardware by porting TI RTOS and using that I can configure and control GPIO0[3] and GPIO0[27], so I assumed that hardware is working.

Please suggest any other way to test it and make it fucntional...

Regards,

Piyush Ghatole

over 2 years ago

0 Bin Liu over 2 years ago

TI__Guru**** 175361 points

Hi Piyush,

First compile /sys/firmware/fdt back to DTS and check if gpio0_3 and gpio0_27 are referenced in any DT node.

If not, please check if you have any application, which starts during Linux boot, uses gpio0_3 and gpio0_27.

0 piyush ghatole over 2 years ago

Prodigy 10 points

Hello Bin,

Sorry for my late response.

i have converted my fdt back to dts, can you please take a look and verify.

/dts-v1/;

/ {
	compatible = "ti,am437x-eth", "ti,am4372", "ti,am43";
	interrupt-parent = <0x1>;
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	model = "TI AM437x Industrial Development Kit";

	chosen {
		u-boot,version = "2023.01-rc1";
		bootargs = "console=ttyO0,115200n8 root=/dev/mmcblk0p2";
		stdout-path = "/ocp@44000000/interconnect@44c00000/segment@200000/target-module@9000/serial@0";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};

	aliases {
		i2c0 = "/ocp@44000000/interconnect@44c00000/segment@200000/target-module@b000/i2c@0";
		i2c1 = "/ocp@44000000/interconnect@48000000/segment@0/target-module@2a000/i2c@0";
		i2c2 = "/ocp@44000000/interconnect@48000000/segment@100000/target-module@9c000/i2c@0";
		serial0 = "/ocp@44000000/interconnect@44c00000/segment@200000/target-module@9000/serial@0";
		serial1 = "/ocp@44000000/interconnect@48000000/segment@0/target-module@22000/serial@0";
		serial2 = "/ocp@44000000/interconnect@48000000/segment@0/target-module@24000/serial@0";
		serial3 = "/ocp@44000000/interconnect@48000000/segment@100000/target-module@a6000/serial@0";
		serial4 = "/ocp@44000000/interconnect@48000000/segment@100000/target-module@a8000/serial@0";
		serial5 = "/ocp@44000000/interconnect@48000000/segment@100000/target-module@aa000/serial@0";
		ethernet0 = "/ocp@44000000/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1";
		ethernet1 = "/ocp@44000000/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2";
		spi0 = "/ocp@44000000/target-module@47900000/spi@0";
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			enable-method = "ti,am4372";
			device_type = "cpu";
			reg = <0x0>;
			clocks = <0x2>;
			clock-names = "cpu";
			operating-points-v2 = <0x3>;
			clock-latency = <0x493e0>;
			cpu-idle-states = <0x4>;
			cpu0-supply = <0x5>;
		};

		idle-states {

			mpu_gate {
				compatible = "arm,idle-state";
				entry-latency-us = <0x28>;
				exit-latency-us = <0x64>;
				min-residency-us = <0x12c>;
				local-timer-stop;
				phandle = <0x4>;
			};
		};
	};

	opp-table {
		compatible = "operating-points-v2-ti-cpu";
		syscon = <0x6>;
		phandle = <0x3>;

		opp50-300000000 {
			opp-hz = <0x0 0x11e1a300>;
			opp-microvolt = <0xe7ef0 0xe34b8 0xec928>;
			opp-supported-hw = <0xff 0x1>;
			opp-suspend;
			status = "disabled";
		};

		opp100-600000000 {
			opp-hz = <0x0 0x23c34600>;
			opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>;
			opp-supported-hw = <0xff 0x4>;
			opp-suspend;
		};

		opp120-720000000 {
			opp-hz = <0x0 0x2aea5400>;
			opp-microvolt = <0x124f80 0x11f1c0 0x12ad40>;
			opp-supported-hw = <0xff 0x8>;
		};

		oppturbo-800000000 {
			opp-hz = <0x0 0x2faf0800>;
			opp-microvolt = <0x1339e0 0x12d770 0x139c50>;
			opp-supported-hw = <0xff 0x10>;
		};

		oppnitro-1000000000 {
			opp-hz = <0x0 0x3b9aca00>;
			opp-microvolt = <0x1437c8 0x13d044 0x149f4c>;
			opp-supported-hw = <0xff 0x20>;
		};
	};

	soc {
		compatible = "ti,omap-infra";

		mpu {
			compatible = "ti,omap4-mpu";
			ti,hwmods = "mpu";
			pm-sram = <0x7 0x8>;
		};
	};

	interrupt-controller@48241000 {
		compatible = "arm,cortex-a9-gic";
		interrupt-controller;
		#interrupt-cells = <0x3>;
		reg = <0x48241000 0x1000 0x48240100 0x100>;
		interrupt-parent = <0x9>;
		phandle = <0x9>;
	};

	interrupt-controller@48281000 {
		compatible = "ti,omap4-wugen-mpu";
		interrupt-controller;
		#interrupt-cells = <0x3>;
		reg = <0x48281000 0x1000>;
		interrupt-parent = <0x9>;
		phandle = <0x1>;
	};

	scu@48240000 {
		compatible = "arm,cortex-a9-scu";
		reg = <0x48240000 0x100>;
	};

	timer@48240200 {
		compatible = "arm,cortex-a9-global-timer";
		reg = <0x48240200 0x100>;
		interrupts = <0x1 0xb 0x1>;
		interrupt-parent = <0x9>;
		clocks = <0xa>;
	};

	timer@48240600 {
		compatible = "arm,cortex-a9-twd-timer";
		reg = <0x48240600 0x100>;
		interrupts = <0x1 0xd 0x1>;
		interrupt-parent = <0x9>;
		clocks = <0xa>;
	};

	cache-controller@48242000 {
		compatible = "arm,pl310-cache";
		reg = <0x48242000 0x1000>;
		cache-unified;
		cache-level = <0x2>;
	};

	ocp@44000000 {
		compatible = "ti,am4372-l3-noc", "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
		ti,hwmods = "l3_main";
		ti,no-idle;
		reg = <0x44000000 0x400000 0x44800000 0x400000>;
		interrupts = <0x0 0x9 0x4 0x0 0xa 0x4>;

		interconnect@44c00000 {
			compatible = "ti,am4-l4-wkup", "simple-bus";
			reg = <0x44c00000 0x800 0x44c00800 0x800 0x44c01000 0x400 0x44c01400 0x400>;
			reg-names = "ap", "la", "ia0", "ia1";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x44c00000 0x100000 0x100000 0x44d00000 0x100000 0x200000 0x44e00000 0x100000>;

			wkup_m3@100000 {
				compatible = "ti,am4372-wkup-m3";
				reg = <0x100000 0x4000 0x180000 0x2000>;
				reg-names = "umem", "dmem";
				ti,hwmods = "wkup_m3";
				ti,pm-firmware = "am335x-pm-firmware.elf";
				phandle = <0x3a>;
			};

			segment@0 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x0 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x1400 0x1400 0x400>;
			};

			segment@100000 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x100000 0x4000 0x4000 0x104000 0x1000 0x80000 0x180000 0x2000 0x82000 0x182000 0x1000 0xf0000 0x1f0000 0x10000>;

				target-module@0 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x0 0x4000>;
				};

				target-module@80000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x80000 0x2000>;
				};

				target-module@f0000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xf0000 0x4>;
					reg-names = "rev";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xf0000 0x10000>;

					prcm@0 {
						compatible = "ti,am4-prcm", "simple-bus";
						reg = <0x0 0x11000>;
						interrupts = <0x0 0xb 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x11000>;

						clocks {
							#address-cells = <0x1>;
							#size-cells = <0x0>;

							clk_32768_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x8000>;
								phandle = <0x1b>;
							};

							clk_rc32k_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x8000>;
								phandle = <0x1a>;
							};

							virt_19200000_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x124f800>;
								phandle = <0x35>;
							};

							virt_24000000_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x16e3600>;
								phandle = <0x36>;
							};

							virt_25000000_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x17d7840>;
								phandle = <0x37>;
							};

							virt_26000000_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x18cba80>;
								phandle = <0x38>;
							};

							tclkin_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x18cba80>;
								phandle = <0x19>;
							};

							dpll_core_ck@2d20 {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-core-clock";
								clocks = <0xb 0xb>;
								reg = <0x2d20 0x2d24 0x2d2c>;
								phandle = <0xc>;
							};

							dpll_core_x2_ck {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-x2-clock";
								clocks = <0xc>;
								phandle = <0xd>;
							};

							dpll_core_m4_ck@2d38 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0xd>;
								ti,max-div = <0x1f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2d38>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
								phandle = <0x15>;
							};

							dpll_core_m5_ck@2d3c {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0xd>;
								ti,max-div = <0x1f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2d3c>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
								phandle = <0x1e>;
							};

							dpll_core_m6_ck@2d40 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0xd>;
								ti,max-div = <0x1f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2d40>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
							};

							dpll_mpu_ck@2d60 {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-clock";
								clocks = <0xb 0xb>;
								reg = <0x2d60 0x2d64 0x2d6c>;
								phandle = <0x2>;
							};

							dpll_mpu_m2_ck@2d70 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x2>;
								ti,max-div = <0x1f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2d70>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
								phandle = <0xe>;
							};

							mpu_periphclk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0xe>;
								clock-mult = <0x1>;
								clock-div = <0x2>;
								phandle = <0xa>;
							};

							dpll_ddr_ck@2da0 {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-clock";
								clocks = <0xb 0xb>;
								reg = <0x2da0 0x2da4 0x2dac>;
								phandle = <0xf>;
							};

							dpll_ddr_m2_ck@2db0 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0xf>;
								ti,max-div = <0x1f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2db0>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
								phandle = <0x25>;
							};

							dpll_disp_ck@2e20 {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-clock";
								clocks = <0xb 0xb>;
								reg = <0x2e20 0x2e24 0x2e2c>;
								phandle = <0x10>;
							};

							dpll_disp_m2_ck@2e30 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x10>;
								ti,max-div = <0x1f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2e30>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
								ti,set-rate-parent;
								phandle = <0x17>;
							};

							dpll_per_ck@2de0 {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-j-type-clock";
								clocks = <0xb 0xb>;
								reg = <0x2de0 0x2de4 0x2dec>;
								phandle = <0x11>;
							};

							dpll_per_m2_ck@2df0 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x11>;
								ti,max-div = <0x7f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2df0>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
								phandle = <0x12>;
							};

							dpll_per_m2_div4_wkupdm_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x12>;
								clock-mult = <0x1>;
								clock-div = <0x4>;
							};

							dpll_per_m2_div4_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x12>;
								clock-mult = <0x1>;
								clock-div = <0x4>;
								phandle = <0x6a>;
							};

							clk_24mhz {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x12>;
								clock-mult = <0x1>;
								clock-div = <0x8>;
								phandle = <0x13>;
							};

							clkdiv32k_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x13>;
								clock-mult = <0x1>;
								clock-div = <0x2dc>;
								phandle = <0x14>;
							};

							clkdiv32k_ick@2a38 {
								#clock-cells = <0x0>;
								compatible = "ti,gate-clock";
								clocks = <0x14>;
								ti,bit-shift = <0x8>;
								reg = <0x2a38>;
								phandle = <0x18>;
							};

							sysclk_div {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x15>;
								clock-mult = <0x1>;
								clock-div = <0x1>;
								phandle = <0x16>;
							};

							pruss_ocp_gclk@4248 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x16 0x17>;
								reg = <0x4248>;
								phandle = <0x64>;
							};

							clk_32k_tpm_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x8000>;
								phandle = <0x1c>;
							};

							timer1_fck@4200 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0xb 0x18 0x19 0x1a 0x1b 0x1c>;
								reg = <0x4200>;
								phandle = <0x3d>;
							};

							timer2_fck@4204 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18>;
								reg = <0x4204>;
								phandle = <0x44>;
							};

							timer3_fck@4208 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18>;
								reg = <0x4208>;
							};

							timer4_fck@420c {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18>;
								reg = <0x420c>;
							};

							timer5_fck@4210 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18>;
								reg = <0x4210>;
							};

							timer6_fck@4214 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18>;
								reg = <0x4214>;
							};

							timer7_fck@4218 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18>;
								reg = <0x4218>;
							};

							wdt1_fck@422c {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x1a 0x18>;
								reg = <0x422c>;
							};

							l3_gclk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x15>;
								clock-mult = <0x1>;
								clock-div = <0x1>;
							};

							dpll_core_m4_div2_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x16>;
								clock-mult = <0x1>;
								clock-div = <0x2>;
								phandle = <0x1d>;
							};

							l4hs_gclk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x15>;
								clock-mult = <0x1>;
								clock-div = <0x1>;
							};

							l3s_gclk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x1d>;
								clock-mult = <0x1>;
								clock-div = <0x1>;
								phandle = <0x69>;
							};

							l4ls_gclk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x1d>;
								clock-mult = <0x1>;
								clock-div = <0x1>;
								phandle = <0x39>;
							};

							cpsw_125mhz_gclk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x1e>;
								clock-mult = <0x1>;
								clock-div = <0x2>;
								phandle = <0x5a>;
							};

							cpsw_cpts_rft_clk@4238 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x16 0x1e 0x17>;
								reg = <0x4238>;
								phandle = <0x5d>;
							};

							dpll_clksel_mac_clk@4234 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x1e>;
								reg = <0x4234>;
								ti,bit-shift = <0x2>;
								ti,dividers = <0x2 0x5>;
								phandle = <0x5b>;
							};

							clk_32k_mosc_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-clock";
								clock-frequency = <0x8000>;
								phandle = <0x1f>;
							};

							gpio0_dbclk_mux_ck@4240 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x1a 0x1b 0x18 0x1f 0x1c>;
								reg = <0x4240>;
							};

							mmc_clk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x12>;
								clock-mult = <0x1>;
								clock-div = <0x2>;
							};

							gfx_fclk_clksel_ck@423c {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x16 0x12>;
								ti,bit-shift = <0x1>;
								reg = <0x423c>;
								phandle = <0x20>;
							};

							gfx_fck_div_ck@423c {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x20>;
								reg = <0x423c>;
								ti,max-div = <0x2>;
								phandle = <0x6d>;
							};

							disp_clk@4244 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x17 0x1e 0x12>;
								reg = <0x4244>;
								ti,set-rate-parent;
								phandle = <0x53>;
							};

							dpll_extdev_ck@2e60 {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-clock";
								clocks = <0xb 0xb>;
								reg = <0x2e60 0x2e64 0x2e6c>;
								phandle = <0x21>;
							};

							dpll_extdev_m2_ck@2e70 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x21>;
								ti,max-div = <0x7f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2e70>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
								phandle = <0x2a>;
							};

							mux_synctimer32k_ck@4230 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x1b 0x1c 0x18>;
								reg = <0x4230>;
							};

							timer8_fck@421c {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18 0x1c>;
								reg = <0x421c>;
							};

							timer9_fck@4220 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18 0x1c>;
								reg = <0x4220>;
							};

							timer10_fck@4224 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18 0x1c>;
								reg = <0x4224>;
							};

							timer11_fck@4228 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x19 0xb 0x18 0x1c>;
								reg = <0x4228>;
							};

							cpsw_50m_clkdiv {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x1e>;
								clock-mult = <0x1>;
								clock-div = <0x1>;
								phandle = <0x22>;
							};

							cpsw_5m_clkdiv {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x22>;
								clock-mult = <0x1>;
								clock-div = <0xa>;
							};

							dpll_ddr_x2_ck {
								#clock-cells = <0x0>;
								compatible = "ti,am3-dpll-x2-clock";
								clocks = <0xf>;
								phandle = <0x23>;
							};

							dpll_ddr_m4_ck@2db8 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x23>;
								ti,max-div = <0x1f>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2db8>;
								ti,index-starts-at-one;
								ti,invert-autoidle-bit;
							};

							dpll_per_clkdcoldo@2e14 {
								#clock-cells = <0x0>;
								compatible = "ti,fixed-factor-clock";
								clocks = <0x11>;
								ti,clock-mult = <0x1>;
								ti,clock-div = <0x1>;
								ti,autoidle-shift = <0x8>;
								reg = <0x2e14>;
								ti,invert-autoidle-bit;
							};

							dll_aging_clk_div@4250 {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0xb>;
								reg = <0x4250>;
								ti,dividers = <0x8 0x10 0x20>;
							};

							div_core_25m_ck {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x16>;
								clock-mult = <0x1>;
								clock-div = <0x8>;
							};

							func_12m_clk {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0x12>;
								clock-mult = <0x1>;
								clock-div = <0x10>;
								phandle = <0x54>;
							};

							vtp_clk_div {
								#clock-cells = <0x0>;
								compatible = "fixed-factor-clock";
								clocks = <0xb>;
								clock-mult = <0x1>;
								clock-div = <0x2>;
							};

							usbphy_32khz_clkmux@4260 {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x1b 0x1c>;
								reg = <0x4260>;
								phandle = <0x24>;
							};

							usb_phy0_always_on_clk32k@2a40 {
								#clock-cells = <0x0>;
								compatible = "ti,gate-clock";
								clocks = <0x24>;
								ti,bit-shift = <0x8>;
								reg = <0x2a40>;
								phandle = <0x56>;
							};

							usb_phy1_always_on_clk32k@2a48 {
								#clock-cells = <0x0>;
								compatible = "ti,gate-clock";
								clocks = <0x24>;
								ti,bit-shift = <0x8>;
								reg = <0x2a48>;
								phandle = <0x58>;
							};

							clkout1-osc-div-ck {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0xb>;
								ti,bit-shift = <0x14>;
								ti,max-div = <0x4>;
								reg = <0x4100>;
								phandle = <0x28>;
							};

							clkout1-src2-mux-ck {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x1a 0x16 0x25 0x12 0x17 0xe>;
								reg = <0x4100>;
								phandle = <0x26>;
							};

							clkout1-src2-pre-div-ck {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x26>;
								ti,bit-shift = <0x4>;
								ti,max-div = <0x8>;
								reg = <0x4100>;
								phandle = <0x27>;
							};

							clkout1-src2-post-div-ck {
								#clock-cells = <0x0>;
								compatible = "ti,divider-clock";
								clocks = <0x27>;
								ti,bit-shift = <0x8>;
								ti,max-div = <0x20>;
								ti,index-power-of-two;
								reg = <0x4100>;
								phandle = <0x29>;
							};

							clkout1-mux-ck {
								#clock-cells = <0x0>;
								compatible = "ti,mux-clock";
								clocks = <0x28 0x1a 0x29 0x2a>;
								ti,bit-shift = <0x10>;
								reg = <0x4100>;
								phandle = <0x2b>;
							};

							clkout1-ck {
								#clock-cells = <0x0>;
								compatible = "ti,gate-clock";
								clocks = <0x2b>;
								ti,bit-shift = <0x17>;
								reg = <0x4100>;
							};
						};

						clockdomains {
						};

						wkup-cm@2800 {
							compatible = "ti,omap4-cm";
							reg = <0x2800 0x400>;
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							ranges = <0x0 0x2800 0x400>;

							l3s-tsc-clkctrl@120 {
								compatible = "ti,clkctrl";
								reg = <0x120 0x4>;
								#clock-cells = <0x2>;
								phandle = <0x30>;
							};

							l4-wkup-aon-clkctrl@228 {
								compatible = "ti,clkctrl";
								reg = <0x228 0xc>;
								#clock-cells = <0x2>;
								phandle = <0x3f>;
							};

							l4-wkup-clkctrl@220 {
								compatible = "ti,clkctrl";
								reg = <0x220 0x4 0x328 0x44>;
								#clock-cells = <0x2>;
								phandle = <0x2c>;
							};
						};

						mpu-cm@8300 {
							compatible = "ti,omap4-cm";
							reg = <0x8300 0x100>;
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							ranges = <0x0 0x8300 0x100>;

							mpu-clkctrl@20 {
								compatible = "ti,clkctrl";
								reg = <0x20 0x4>;
								#clock-cells = <0x2>;
							};
						};

						gfx-l3-cm@8400 {
							compatible = "ti,omap4-cm";
							reg = <0x8400 0x100>;
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							ranges = <0x0 0x8400 0x100>;

							gfx-l3-clkctrl@20 {
								compatible = "ti,clkctrl";
								reg = <0x20 0x4>;
								#clock-cells = <0x2>;
								phandle = <0x6b>;
							};
						};

						l4-rtc-cm@8500 {
							compatible = "ti,omap4-cm";
							reg = <0x8500 0x100>;
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							ranges = <0x0 0x8500 0x100>;

							l4-rtc-clkctrl@20 {
								compatible = "ti,clkctrl";
								reg = <0x20 0x4>;
								#clock-cells = <0x2>;
								phandle = <0x3e>;
							};
						};

						per-cm@8800 {
							compatible = "ti,omap4-cm";
							reg = <0x8800 0xc00>;
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							ranges = <0x0 0x8800 0xc00>;

							l3-clkctrl@20 {
								compatible = "ti,clkctrl";
								reg = <0x20 0x3c 0x78 0x2c>;
								#clock-cells = <0x2>;
								phandle = <0x5e>;
							};

							l3s-clkctrl@68 {
								compatible = "ti,clkctrl";
								reg = <0x68 0xc 0x220 0x4c>;
								#clock-cells = <0x2>;
								phandle = <0x43>;
							};

							pruss-ocp-clkctrl@320 {
								compatible = "ti,clkctrl";
								reg = <0x320 0x4>;
								#clock-cells = <0x2>;
								phandle = <0x62>;
							};

							l4ls-clkctrl@420 {
								compatible = "ti,clkctrl";
								reg = <0x420 0x1a4>;
								#clock-cells = <0x2>;
								phandle = <0x40>;
							};

							emif-clkctrl@720 {
								compatible = "ti,clkctrl";
								reg = <0x720 0x4>;
								#clock-cells = <0x2>;
							};

							dss-clkctrl@a20 {
								compatible = "ti,clkctrl";
								reg = <0xa20 0x4>;
								#clock-cells = <0x2>;
								phandle = <0x52>;
							};

							cpsw-125mhz-clkctrl@b20 {
								compatible = "ti,clkctrl";
								reg = <0xb20 0x4>;
								#clock-cells = <0x2>;
								phandle = <0x59>;
							};
						};

						prm@400 {
							compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
							reg = <0x400 0x100>;
							#power-domain-cells = <0x0>;
							#reset-cells = <0x1>;
							phandle = <0x6c>;
						};

						prm@800 {
							compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
							reg = <0x800 0x100>;
							#reset-cells = <0x1>;
							phandle = <0x63>;
						};

						prm@2000 {
							compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
							reg = <0x2000 0x100>;
							#reset-cells = <0x1>;
						};

						prm@4000 {
							compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
							reg = <0x4000 0x100>;
							#reset-cells = <0x1>;
						};
					};
				};
			};

			segment@200000 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x200000 0x1000 0x3000 0x203000 0x1000 0x4000 0x204000 0x1000 0x5000 0x205000 0x1000 0x6000 0x206000 0x1000 0x7000 0x207000 0x1000 0x8000 0x208000 0x1000 0x9000 0x209000 0x1000 0xa000 0x20a000 0x1000 0xb000 0x20b000 0x1000 0xc000 0x20c000 0x1000 0xd000 0x20d000 0x1000 0xf000 0x20f000 0x1000 0x10000 0x210000 0x10000 0x30000 0x230000 0x1000 0x31000 0x231000 0x1000 0x32000 0x232000 0x1000 0x33000 0x233000 0x1000 0x34000 0x234000 0x1000 0x35000 0x235000 0x1000 0x36000 0x236000 0x1000 0x37000 0x237000 0x1000 0x38000 0x238000 0x1000 0x39000 0x239000 0x1000 0x3a000 0x23a000 0x1000 0x3e000 0x23e000 0x1000 0x3f000 0x23f000 0x1000 0x40000 0x240000 0x40000 0x80000 0x280000 0x1000 0x88000 0x288000 0x8000 0x92000 0x292000 0x1000 0x86000 0x286000 0x1000 0x87000 0x287000 0x1000 0x90000 0x290000 0x1000 0x91000 0x291000 0x1000>;

				target-module@3000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x3000 0x1000>;
				};

				target-module@5000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x5000 0x1000>;
				};

				target-module@7000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x7000 0x4 0x7010 0x4 0x7114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x2c 0x148 0x0 0x2c 0x148 0x8>;
					clock-names = "fck", "dbclk";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x7000 0x1000>;

					gpio@0 {
						compatible = "ti,am4372-gpio", "ti,omap4-gpio";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x60 0x4>;
						gpio-controller;
						#gpio-cells = <0x2>;
						interrupt-controller;
						#interrupt-cells = <0x2>;
						status = "okay";
						phandle = <0x73>;
					};
				};

				target-module@9000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x9050 0x4 0x9054 0x4 0x9058 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x2c 0x128 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x9000 0x1000>;

					serial@0 {
						compatible = "ti,am4372-uart", "ti,omap2-uart";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x48 0x4>;
					};
				};

				target-module@b000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xb000 0x8 0xb010 0x8 0xb090 0x8>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x2c 0x120 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xb000 0x1000>;

					i2c@0 {
						compatible = "ti,am4372-i2c", "ti,omap4-i2c";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x46 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "okay";
						pinctrl-names = "default", "sleep";
						pinctrl-0 = <0x2d>;
						pinctrl-1 = <0x2e>;
						clock-frequency = <0x61a80>;

						at24@50 {
							compatible = "atmel,24c256";
							pagesize = <0x40>;
							reg = <0x50>;
						};

						tps62362@60 {
							compatible = "ti,tps62362";
							reg = <0x60>;
							regulator-name = "VDD_MPU";
							regulator-min-microvolt = <0xe7ef0>;
							regulator-max-microvolt = <0x144b50>;
							regulator-boot-on;
							regulator-always-on;
							ti,vsel0-state-high;
							ti,vsel1-state-high;
							vin-supply = <0x2f>;
							phandle = <0x5>;
						};
					};
				};

				target-module@d000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xd000 0x4 0xd010 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x30 0x0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xd000 0x1000>;

					tscadc@0 {
						compatible = "ti,am3359-tscadc";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x10 0x4>;
						clocks = <0x31>;
						clock-names = "fck";
						status = "disabled";
						dmas = <0x32 0x35 0x0 0x32 0x39 0x0>;
						dma-names = "fifo0", "fifo1";

						tsc {
							compatible = "ti,am3359-tsc";
						};

						adc {
							#io-channel-cells = <0x1>;
							compatible = "ti,am3359-adc";
						};
					};
				};

				target-module@10000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x10000 0x4>;
					reg-names = "rev";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x10000 0x10000>;

					scm@0 {
						compatible = "ti,am4-scm", "simple-bus";
						reg = <0x0 0x4000>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x4000>;

						pinmux@800 {
							compatible = "ti,am437-padconf", "pinctrl-single";
							reg = <0x800 0x31c>;
							#address-cells = <0x1>;
							#size-cells = <0x0>;
							#pinctrl-cells = <0x1>;
							#interrupt-cells = <0x1>;
							interrupt-controller;
							pinctrl-single,register-width = <0x20>;
							pinctrl-single,function-mask = <0xffffffff>;

							i2c0_pins_default {
								pinctrl-single,pins = <0x188 0x50000 0x18c 0x50000>;
								phandle = <0x2d>;
							};

							i2c0_pins_sleep {
								pinctrl-single,pins = <0x188 0x40007 0x18c 0x40007>;
								phandle = <0x2e>;
							};

							i2c1_pins_default {
								pinctrl-single,pins = <0x20c 0x50003 0x208 0x50003>;
								phandle = <0x41>;
							};

							i2c1_pins_sleep {
								pinctrl-single,pins = <0x20c 0x40003 0x208 0x40003>;
								phandle = <0x42>;
							};

							i2c2_pins_default {
								pinctrl-single,pins = <0x1c4 0x50008 0x1c0 0x50008>;
								phandle = <0x47>;
							};

							i2c2_pins_sleep {
								pinctrl-single,pins = <0x1c4 0x40008 0x1c0 0x40008>;
								phandle = <0x48>;
							};

							uart3_pins_default {
								pinctrl-single,pins = <0x228 0x50000 0x22c 0x10000>;
								phandle = <0x49>;
							};

							pinmux_mmc1_pins_default {
								pinctrl-single,pins = <0x100 0x50000 0x104 0x50000 0x1f0 0x50000 0x1f4 0x50000 0x1f8 0x50000 0x1fc 0x50000 0x160 0x50007>;
								phandle = <0x45>;
							};

							pinmux_mmc1_pins_sleep {
								pinctrl-single,pins = <0x100 0x40007 0x104 0x40007 0x1f0 0x40007 0x1f4 0x40007 0x1f8 0x40007 0x1fc 0x40007 0x160 0x40007>;
								phandle = <0x46>;
							};

							gpio0_mux_pins {
								pinctlr-single,pins = <0x1ac 0x10009 0x164 0x10007>;
								phandle = <0x72>;
							};
						};

						scm_conf@0 {
							compatible = "syscon", "simple-bus";
							reg = <0x0 0x800>;
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							phandle = <0x6>;

							phy-gmii-sel {
								compatible = "ti,am43xx-phy-gmii-sel";
								reg = <0x650 0x4>;
								#phy-cells = <0x2>;
								phandle = <0x5c>;
							};

							clocks {
								#address-cells = <0x1>;
								#size-cells = <0x0>;

								sys_clkin_ck@40 {
									#clock-cells = <0x0>;
									compatible = "ti,mux-clock";
									clocks = <0x33 0x34>;
									ti,bit-shift = <0x1f>;
									reg = <0x40>;
									phandle = <0xb>;
								};

								crystal_freq_sel_ck@40 {
									#clock-cells = <0x0>;
									compatible = "ti,mux-clock";
									clocks = <0x35 0x36 0x37 0x38>;
									ti,bit-shift = <0x1d>;
									reg = <0x40>;
									phandle = <0x34>;
								};

								sysboot_freq_sel_ck@44e10040 {
									#clock-cells = <0x0>;
									compatible = "ti,mux-clock";
									clocks = <0x35 0x36 0x37 0x38>;
									ti,bit-shift = <0x16>;
									reg = <0x40>;
									phandle = <0x33>;
								};

								adc_tsc_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
									phandle = <0x31>;
								};

								dcan0_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
									phandle = <0x4a>;
								};

								dcan1_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
									phandle = <0x4b>;
								};

								mcasp0_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
								};

								mcasp1_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
								};

								smartreflex0_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
								};

								smartreflex1_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
								};

								sha0_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
								};

								aes0_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
								};

								rng_fck {
									#clock-cells = <0x0>;
									compatible = "fixed-factor-clock";
									clocks = <0xb>;
									clock-mult = <0x1>;
									clock-div = <0x1>;
								};

								ehrpwm0_tbclk@664 {
									#clock-cells = <0x0>;
									compatible = "ti,gate-clock";
									clocks = <0x39>;
									ti,bit-shift = <0x0>;
									reg = <0x664>;
									phandle = <0x4c>;
								};

								ehrpwm1_tbclk@664 {
									#clock-cells = <0x0>;
									compatible = "ti,gate-clock";
									clocks = <0x39>;
									ti,bit-shift = <0x1>;
									reg = <0x664>;
									phandle = <0x4d>;
								};

								ehrpwm2_tbclk@664 {
									#clock-cells = <0x0>;
									compatible = "ti,gate-clock";
									clocks = <0x39>;
									ti,bit-shift = <0x2>;
									reg = <0x664>;
									phandle = <0x4e>;
								};

								ehrpwm3_tbclk@664 {
									#clock-cells = <0x0>;
									compatible = "ti,gate-clock";
									clocks = <0x39>;
									ti,bit-shift = <0x4>;
									reg = <0x664>;
									phandle = <0x4f>;
								};

								ehrpwm4_tbclk@664 {
									#clock-cells = <0x0>;
									compatible = "ti,gate-clock";
									clocks = <0x39>;
									ti,bit-shift = <0x5>;
									reg = <0x664>;
									phandle = <0x50>;
								};

								ehrpwm5_tbclk@664 {
									#clock-cells = <0x0>;
									compatible = "ti,gate-clock";
									clocks = <0x39>;
									ti,bit-shift = <0x6>;
									reg = <0x664>;
									phandle = <0x51>;
								};
							};
						};

						wkup_m3_ipc@1324 {
							compatible = "ti,am4372-wkup-m3-ipc";
							reg = <0x1324 0x44>;
							interrupts = <0x0 0x4e 0x4>;
							ti,rproc = <0x3a>;
							mboxes = <0x3b 0x3c>;
						};

						dma-router@f90 {
							compatible = "ti,am335x-edma-crossbar";
							reg = <0xf90 0x40>;
							#dma-cells = <0x3>;
							dma-requests = <0x40>;
							dma-masters = <0x32>;
						};

						clockdomains {
						};
					};
				};

				target-module@31000 {
					compatible = "ti,sysc-omap2-timer", "ti,sysc";
					reg = <0x31000 0x4 0x31010 0x4 0x31014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x2c 0x108 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x31000 0x1000>;
					ti,no-reset-on-init;
					ti,no-idle;

					timer@0 {
						compatible = "ti,am4372-timer-1ms", "ti,am335x-timer-1ms";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x43 0x4>;
						ti,timer-alwon;
						clocks = <0x3d>;
						clock-names = "fck";
						assigned-clocks = <0x3d>;
						assigned-clock-parents = <0xb>;
					};
				};

				target-module@33000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x33000 0x1000>;
				};

				target-module@35000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x35000 0x4 0x35010 0x4 0x35014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x22>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x2c 0x118 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x35000 0x1000>;

					wdt@0 {
						compatible = "ti,am4372-wdt", "ti,omap3-wdt";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x5b 0x4>;
					};
				};

				target-module@37000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x37000 0x1000>;
				};

				target-module@39000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x39000 0x1000>;
				};

				target-module@3e000 {
					compatible = "ti,sysc-omap4-simple", "ti,sysc";
					reg = <0x3e074 0x4 0x3e078 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x3e 0x0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x3e000 0x1000>;

					rtc@0 {
						compatible = "ti,am4372-rtc", "ti,am3352-rtc", "ti,da830-rtc";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x4b 0x4 0x0 0x4c 0x4>;
						clocks = <0x1b>;
						clock-names = "int-clk";
						system-power-controller;
						status = "disabled";
					};
				};

				target-module@40000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x40000 0x40000>;
				};

				target-module@86000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x86000 0x4 0x86004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-sidle = <0x0 0x1>;
					clocks = <0x3f 0x8 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x86000 0x1000>;

					counter@0 {
						compatible = "ti,am4372-counter32k", "ti,omap-counter32k";
						reg = <0x0 0x40>;
					};
				};

				target-module@88000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x88000 0x8000 0x8000 0x90000 0x1000 0x9000 0x91000 0x1000>;
				};
			};
		};

		interconnect@48000000 {
			compatible = "ti,am4-l4-per", "simple-bus";
			reg = <0x48000000 0x800 0x48000800 0x800 0x48001000 0x400 0x48001400 0x400 0x48001800 0x400 0x48001c00 0x400>;
			reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x48000000 0x100000 0x100000 0x48100000 0x100000 0x200000 0x48200000 0x100000 0x300000 0x48300000 0x100000 0x46000000 0x46000000 0x400000 0x46400000 0x46400000 0x400000>;

			segment@0 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x0 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x1400 0x1400 0x400 0x1800 0x1800 0x400 0x1c00 0x1c00 0x400 0x8000 0x8000 0x1000 0x9000 0x9000 0x1000 0x22000 0x22000 0x1000 0x23000 0x23000 0x1000 0x24000 0x24000 0x1000 0x25000 0x25000 0x1000 0x2a000 0x2a000 0x1000 0x2b000 0x2b000 0x1000 0x38000 0x38000 0x2000 0x3a000 0x3a000 0x1000 0x3c000 0x3c000 0x2000 0x3e000 0x3e000 0x1000 0x40000 0x40000 0x1000 0x41000 0x41000 0x1000 0x42000 0x42000 0x1000 0x43000 0x43000 0x1000 0x44000 0x44000 0x1000 0x45000 0x45000 0x1000 0x46000 0x46000 0x1000 0x47000 0x47000 0x1000 0x48000 0x48000 0x1000 0x49000 0x49000 0x1000 0x4c000 0x4c000 0x1000 0x4d000 0x4d000 0x1000 0x60000 0x60000 0x1000 0x61000 0x61000 0x1000 0x80000 0x80000 0x10000 0x90000 0x90000 0x1000 0x30000 0x30000 0x1000 0x31000 0x31000 0x1000 0x4a000 0x4a000 0x1000 0x4b000 0x4b000 0x1000 0xc8000 0xc8000 0x1000 0xc9000 0xc9000 0x1000 0xca000 0xca000 0x1000 0xcb000 0xcb000 0x1000 0x34000 0x34000 0x1000 0x35000 0x35000 0x1000 0x36000 0x36000 0x1000 0x37000 0x37000 0x1000 0x46000000 0x46000000 0x400000 0x46400000 0x46400000 0x400000>;

				target-module@8000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x8000 0x1000>;
				};

				target-module@22000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x22050 0x4 0x22054 0x4 0x22058 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x160 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x22000 0x1000>;

					serial@0 {
						compatible = "ti,am4372-uart", "ti,omap2-uart";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x49 0x4>;
						status = "disabled";
					};
				};

				target-module@24000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x24050 0x4 0x24054 0x4 0x24058 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x168 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x24000 0x1000>;

					serial@0 {
						compatible = "ti,am4372-uart", "ti,omap2-uart";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x4a 0x4>;
						status = "disabled";
					};
				};

				target-module@2a000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x2a000 0x8 0x2a010 0x8 0x2a090 0x8>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x88 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x2a000 0x1000>;

					i2c@0 {
						compatible = "ti,am4372-i2c", "ti,omap4-i2c";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x47 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "okay";
						pinctrl-names = "default", "sleep";
						pinctrl-0 = <0x41>;
						pinctrl-1 = <0x42>;
						clock-frequency = <0x186a0>;

						TI_adc121@0 {
							compatible = "ti,adc128s052";
							reg = <0x0>;
						};
					};
				};

				target-module@30000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x30000 0x4 0x30110 0x4 0x30114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0xe0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x30000 0x1000>;

					spi@0 {
						compatible = "ti,am4372-mcspi", "ti,omap4-mcspi";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x41 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "disabled";
					};
				};

				target-module@34000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x34000 0x1000>;
				};

				target-module@36000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x36000 0x1000>;
				};

				target-module@38000 {
					compatible = "ti,sysc-omap4-simple", "ti,sysc";
					reg = <0x38000 0x4 0x38004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-sidle = <0x0 0x1 0x2>;
					clocks = <0x43 0x1d0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x38000 0x2000 0x46000000 0x46000000 0x400000>;

					mcasp@0 {
						compatible = "ti,am33xx-mcasp-audio";
						reg = <0x0 0x2000 0x46000000 0x400000>;
						reg-names = "mpu", "dat";
						interrupts = <0x0 0x50 0x4 0x0 0x51 0x4>;
						interrupt-names = "tx", "rx";
						status = "disabled";
						dmas = <0x32 0x8 0x2 0x32 0x9 0x2>;
						dma-names = "tx", "rx";
					};
				};

				target-module@3c000 {
					compatible = "ti,sysc-omap4-simple", "ti,sysc";
					reg = <0x3c000 0x4 0x3c004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-sidle = <0x0 0x1 0x2>;
					clocks = <0x43 0x1d8 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x3c000 0x2000 0x46400000 0x46400000 0x400000>;

					mcasp@0 {
						compatible = "ti,am33xx-mcasp-audio";
						reg = <0x0 0x2000 0x46400000 0x400000>;
						reg-names = "mpu", "dat";
						interrupts = <0x0 0x52 0x4 0x0 0x53 0x4>;
						interrupt-names = "tx", "rx";
						status = "disabled";
						dmas = <0x32 0xa 0x2 0x32 0xb 0x2>;
						dma-names = "tx", "rx";
					};
				};

				target-module@40000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x40000 0x4 0x40010 0x4 0x40014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x110 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x40000 0x1000>;
					ti,no-reset-on-init;
					ti,no-idle;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x44 0x4>;
						clocks = <0x44>;
						clock-names = "fck";
						assigned-clocks = <0x44>;
						assigned-clock-parents = <0xb>;
					};
				};

				target-module@42000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x42000 0x4 0x42010 0x4 0x42014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x118 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x42000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x45 0x4>;
						status = "disabled";
					};
				};

				target-module@44000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x44000 0x4 0x44010 0x4 0x44014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x120 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x44000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x5c 0x4>;
						ti,timer-pwm;
						status = "disabled";
					};
				};

				target-module@46000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x46000 0x4 0x46010 0x4 0x46014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x128 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x46000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x5d 0x4>;
						ti,timer-pwm;
						status = "disabled";
					};
				};

				target-module@48000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x48000 0x4 0x48010 0x4 0x48014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x130 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x48000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x5e 0x4>;
						ti,timer-pwm;
						status = "disabled";
					};
				};

				target-module@4a000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x4a000 0x4 0x4a010 0x4 0x4a014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x138 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x4a000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x5f 0x4>;
						ti,timer-pwm;
						status = "disabled";
					};
				};

				target-module@4c000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x4c000 0x4 0x4c010 0x4 0x4c114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x58 0x0 0x40 0x58 0x8>;
					clock-names = "fck", "dbclk";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x4c000 0x1000>;

					gpio@0 {
						compatible = "ti,am4372-gpio", "ti,omap4-gpio";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x62 0x4>;
						gpio-controller;
						#gpio-cells = <0x2>;
						interrupt-controller;
						#interrupt-cells = <0x2>;
						status = "okay";
					};
				};

				target-module@60000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x602fc 0x4 0x60110 0x4 0x60114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0xa0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x60000 0x1000>;

					mmc@0 {
						compatible = "ti,am437-sdhci";
						reg = <0x0 0x1000>;
						ti,needs-special-reset;
						dmas = <0x32 0x18 0x0 0x32 0x19 0x0>;
						dma-names = "tx", "rx";
						interrupts = <0x0 0x40 0x4>;
						status = "okay";
						pinctrl-names = "default", "sleep";
						pinctrl-0 = <0x45>;
						pinctrl-1 = <0x46>;
						vmmc-supply = <0x2f>;
						bus-width = <0x4>;
					};
				};

				target-module@80000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x80000 0x4 0x80010 0x4 0x80014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x48 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x80000 0x10000>;

					elm@0 {
						compatible = "ti,am3352-elm";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x4 0x4>;
						clocks = <0x39>;
						clock-names = "fck";
						status = "disabled";
					};
				};

				target-module@c8000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xc8000 0x4 0xc8010 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					clocks = <0x40 0x98 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xc8000 0x1000>;

					mailbox@0 {
						compatible = "ti,omap4-mailbox";
						reg = <0x0 0x200>;
						interrupts = <0x0 0x4d 0x4>;
						#mbox-cells = <0x1>;
						ti,mbox-num-users = <0x4>;
						ti,mbox-num-fifos = <0x8>;
						phandle = <0x3b>;

						mbox-wkup-m3 {
							ti,mbox-send-noirq;
							ti,mbox-tx = <0x0 0x0 0x0>;
							ti,mbox-rx = <0x0 0x0 0x3>;
							phandle = <0x3c>;
						};
					};
				};

				target-module@ca000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xca000 0x4 0xca010 0x4 0xca014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x108 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xca000 0x1000>;

					spinlock@0 {
						compatible = "ti,omap4-hwspinlock";
						reg = <0x0 0x1000>;
						#hwlock-cells = <0x1>;
					};
				};
			};

			segment@100000 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x8c000 0x18c000 0x1000 0x8d000 0x18d000 0x1000 0x8e000 0x18e000 0x1000 0x8f000 0x18f000 0x1000 0x9c000 0x19c000 0x1000 0x9d000 0x19d000 0x1000 0xa6000 0x1a6000 0x1000 0xa7000 0x1a7000 0x1000 0xa8000 0x1a8000 0x1000 0xa9000 0x1a9000 0x1000 0xaa000 0x1aa000 0x1000 0xab000 0x1ab000 0x1000 0xac000 0x1ac000 0x1000 0xad000 0x1ad000 0x1000 0xae000 0x1ae000 0x1000 0xaf000 0x1af000 0x1000 0xcc000 0x1cc000 0x2000 0xce000 0x1ce000 0x2000 0xd0000 0x1d0000 0x2000 0xd2000 0x1d2000 0x2000 0xd8000 0x1d8000 0x1000 0xd9000 0x1d9000 0x1000 0xa0000 0x1a0000 0x1000 0xa1000 0x1a1000 0x1000 0xa2000 0x1a2000 0x1000 0xa3000 0x1a3000 0x1000 0xa4000 0x1a4000 0x1000 0xa5000 0x1a5000 0x1000 0xc1000 0x1c1000 0x1000 0xc2000 0x1c2000 0x1000>;

				target-module@8c000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x8c000 0x1000>;
				};

				target-module@8e000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x8e000 0x1000>;
				};

				target-module@9c000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x9c000 0x8 0x9c010 0x8 0x9c090 0x8>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x90 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x9c000 0x1000>;

					i2c@0 {
						compatible = "ti,am4372-i2c", "ti,omap4-i2c";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x1e 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "okay";
						pinctrl-names = "default", "sleep";
						pinctrl-0 = <0x47>;
						pinctrl-1 = <0x48>;
						clock-frequency = <0x186a0>;

						eeprom@58 {
							compatible = "atmel,24mac402";
							pagesize = <0x100>;
							reg = <0x58>;
							#address-cell = <0x1>;
							#size-cell = <0x1>;
						};
					};
				};

				target-module@a0000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xa0000 0x4 0xa0110 0x4 0xa0114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0xe8 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xa0000 0x1000>;

					spi@0 {
						compatible = "ti,am4372-mcspi", "ti,omap4-mcspi";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x7d 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "disabled";
					};
				};

				target-module@a2000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xa2000 0x4 0xa2110 0x4 0xa2114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0xf0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xa2000 0x1000>;

					spi@0 {
						compatible = "ti,am4372-mcspi", "ti,omap4-mcspi";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x7e 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "disabled";
					};
				};

				target-module@a4000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xa4000 0x4 0xa4110 0x4 0xa4114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0xf8 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xa4000 0x1000>;

					spi@0 {
						compatible = "ti,am4372-mcspi", "ti,omap4-mcspi";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x88 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "disabled";
					};
				};

				target-module@a6000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xa6050 0x4 0xa6054 0x4 0xa6058 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x170 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xa6000 0x1000>;

					serial@0 {
						compatible = "ti,am4372-uart", "ti,omap2-uart";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x2c 0x4>;
						status = "okay";
						pinctrl-names = "default";
						pinctrl-0 = <0x49>;
					};
				};

				target-module@a8000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xa8050 0x4 0xa8054 0x4 0xa8058 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x178 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xa8000 0x1000>;

					serial@0 {
						compatible = "ti,am4372-uart", "ti,omap2-uart";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x2d 0x4>;
						status = "disabled";
					};
				};

				target-module@aa000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xaa050 0x4 0xaa054 0x4 0xaa058 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x180 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xaa000 0x1000>;

					serial@0 {
						compatible = "ti,am4372-uart", "ti,omap2-uart";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x2e 0x4>;
						status = "disabled";
					};
				};

				target-module@ac000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xac000 0x4 0xac010 0x4 0xac114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x60 0x0 0x40 0x60 0x8>;
					clock-names = "fck", "dbclk";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xac000 0x1000>;

					gpio@0 {
						compatible = "ti,am4372-gpio", "ti,omap4-gpio";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x20 0x4>;
						gpio-controller;
						#gpio-cells = <0x2>;
						interrupt-controller;
						#interrupt-cells = <0x2>;
						status = "disabled";
					};
				};

				target-module@ae000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xae000 0x4 0xae010 0x4 0xae114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x68 0x0 0x40 0x68 0x8>;
					clock-names = "fck", "dbclk";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xae000 0x1000>;

					gpio@0 {
						compatible = "ti,am4372-gpio", "ti,omap4-gpio";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x3e 0x4>;
						gpio-controller;
						#gpio-cells = <0x2>;
						interrupt-controller;
						#interrupt-cells = <0x2>;
						status = "okay";
					};
				};

				target-module@c1000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0xc1000 0x4 0xc1010 0x4 0xc1014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x140 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xc1000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x83 0x4>;
						status = "disabled";
					};
				};

				target-module@cc000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xcc020 0x4>;
					reg-names = "rev";
					clocks = <0x40 0x8 0x0 0x4a>;
					clock-names = "fck", "osc";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xcc000 0x2000>;

					can@0 {
						compatible = "ti,am4372-d_can", "ti,am3352-d_can";
						reg = <0x0 0x2000>;
						clocks = <0x4a>;
						clock-names = "fck";
						syscon-raminit = <0x6 0x644 0x0>;
						interrupts = <0x0 0x34 0x4>;
						status = "disabled";
					};
				};

				target-module@d0000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xd0020 0x4>;
					reg-names = "rev";
					clocks = <0x40 0x10 0x0 0x4b>;
					clock-names = "fck", "osc";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xd0000 0x2000>;

					can@0 {
						compatible = "ti,am4372-d_can", "ti,am3352-d_can";
						reg = <0x0 0x2000>;
						clocks = <0x4b>;
						clock-names = "fck";
						syscon-raminit = <0x6 0x644 0x1>;
						interrupts = <0x0 0x31 0x4>;
						status = "disabled";
					};
				};

				target-module@d8000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0xd82fc 0x4 0xd8110 0x4 0xd8114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0xa8 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xd8000 0x1000>;

					mmc@0 {
						compatible = "ti,am437-sdhci";
						reg = <0x0 0x1000>;
						ti,needs-special-reset;
						dmas = <0x32 0x2 0x0 0x32 0x3 0x0>;
						dma-names = "tx", "rx";
						interrupts = <0x0 0x1c 0x4>;
						status = "disabled";
					};
				};
			};

			segment@200000 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
			};

			segment@300000 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x300000 0x1000 0x1000 0x301000 0x1000 0x2000 0x302000 0x1000 0x3000 0x303000 0x1000 0x4000 0x304000 0x1000 0x5000 0x305000 0x1000 0x18000 0x318000 0x4000 0x1c000 0x31c000 0x1000 0x10000 0x310000 0x2000 0x28000 0x328000 0x1000 0x29000 0x329000 0x1000 0x12000 0x312000 0x1000 0x20000 0x320000 0x1000 0x21000 0x321000 0x1000 0x26000 0x326000 0x1000 0x27000 0x327000 0x1000 0x2a000 0x32a000 0x400 0x2c000 0x32c000 0x1000 0x13000 0x313000 0x1000 0x14000 0x314000 0x1000 0x6000 0x306000 0x1000 0x7000 0x307000 0x1000 0x8000 0x308000 0x1000 0x9000 0x309000 0x1000 0xa000 0x30a000 0x1000 0xb000 0x30b000 0x1000 0x3d000 0x33d000 0x1000 0x3e000 0x33e000 0x1000 0x3f000 0x33f000 0x1000 0x40000 0x340000 0x1000 0x41000 0x341000 0x1000 0x42000 0x342000 0x1000 0x45000 0x345000 0x1000 0x46000 0x346000 0x1000 0x47000 0x347000 0x1000 0x48000 0x348000 0x1000 0xf2000 0x3f2000 0x2000 0xf4000 0x3f4000 0x1000 0x4c000 0x34c000 0x2000 0x4e000 0x34e000 0x1000 0x22000 0x322000 0x1000 0x23000 0x323000 0x1000 0xf0000 0x3f0000 0x1000 0x2a400 0x32a400 0x400 0x2a800 0x32a800 0x400 0x2ac00 0x32ac00 0x400 0x2b000 0x32b000 0x1000 0x80000 0x380000 0x20000 0xa0000 0x3a0000 0x1000 0xa8000 0x3a8000 0x8000 0xb0000 0x3b0000 0x1000 0xc0000 0x3c0000 0x20000 0xe0000 0x3e0000 0x1000 0xe8000 0x3e8000 0x8000>;

				target-module@0 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x0 0x4 0x4 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x18 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x0 0x1000>;

					epwmss@0 {
						compatible = "ti,am4372-pwmss", "ti,am33xx-pwmss";
						reg = <0x0 0x10>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x1000>;
						status = "disabled";

						pwm@100 {
							compatible = "ti,am4372-ecap", "ti,am3352-ecap";
							#pwm-cells = <0x3>;
							reg = <0x100 0x80>;
							clocks = <0x39>;
							clock-names = "fck";
							status = "disabled";
						};

						pwm@200 {
							compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm";
							#pwm-cells = <0x3>;
							reg = <0x200 0x80>;
							clocks = <0x4c 0x39>;
							clock-names = "tbclk", "fck";
							status = "disabled";
						};
					};
				};

				target-module@2000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x2000 0x4 0x2004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x20 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x2000 0x1000>;

					epwmss@0 {
						compatible = "ti,am4372-pwmss", "ti,am33xx-pwmss";
						reg = <0x0 0x10>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x1000>;
						status = "disabled";

						pwm@100 {
							compatible = "ti,am4372-ecap", "ti,am3352-ecap";
							#pwm-cells = <0x3>;
							reg = <0x100 0x80>;
							clocks = <0x39>;
							clock-names = "fck";
							status = "disabled";
						};

						pwm@200 {
							compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm";
							#pwm-cells = <0x3>;
							reg = <0x200 0x80>;
							clocks = <0x4d 0x39>;
							clock-names = "tbclk", "fck";
							status = "disabled";
						};
					};
				};

				target-module@4000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x4000 0x4 0x4004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x28 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x4000 0x1000>;

					epwmss@0 {
						compatible = "ti,am4372-pwmss", "ti,am33xx-pwmss";
						reg = <0x0 0x10>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x1000>;
						status = "disabled";

						pwm@100 {
							compatible = "ti,am4372-ecap", "ti,am3352-ecap";
							#pwm-cells = <0x3>;
							reg = <0x100 0x80>;
							clocks = <0x39>;
							clock-names = "fck";
							status = "disabled";
						};

						pwm@200 {
							compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm";
							#pwm-cells = <0x3>;
							reg = <0x200 0x80>;
							clocks = <0x4e 0x39>;
							clock-names = "tbclk", "fck";
							status = "disabled";
						};
					};
				};

				target-module@6000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x6000 0x4 0x6004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x30 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x6000 0x1000>;

					epwmss@0 {
						compatible = "ti,am4372-pwmss", "ti,am33xx-pwmss";
						reg = <0x0 0x10>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x1000>;
						status = "disabled";

						pwm@200 {
							compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm";
							#pwm-cells = <0x3>;
							reg = <0x200 0x80>;
							clocks = <0x4f 0x39>;
							clock-names = "tbclk", "fck";
							status = "disabled";
						};
					};
				};

				target-module@8000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x8000 0x4 0x8004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x38 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x8000 0x1000>;

					epwmss@0 {
						compatible = "ti,am4372-pwmss", "ti,am33xx-pwmss";
						reg = <0x0 0x10>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x1000>;
						status = "disabled";

						pwm@48308200 {
							compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm";
							#pwm-cells = <0x3>;
							reg = <0x200 0x80>;
							clocks = <0x50 0x39>;
							clock-names = "tbclk", "fck";
							status = "disabled";
						};
					};
				};

				target-module@a000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xa000 0x4 0xa004 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x40 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xa000 0x1000>;

					epwmss@0 {
						compatible = "ti,am4372-pwmss", "ti,am33xx-pwmss";
						reg = <0x0 0x10>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x1000>;
						status = "disabled";

						pwm@200 {
							compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm";
							#pwm-cells = <0x3>;
							reg = <0x200 0x80>;
							clocks = <0x51 0x39>;
							clock-names = "tbclk", "fck";
							status = "disabled";
						};
					};
				};

				target-module@10000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x11fe0 0x4 0x11fe4 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1>;
					clocks = <0x40 0xc0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x10000 0x2000>;

					rng@0 {
						compatible = "ti,omap4-rng";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x6f 0x4>;
					};
				};

				target-module@13000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x13000 0x1000>;
				};

				target-module@18000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x18000 0x4000>;
				};

				target-module@20000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x20000 0x4 0x20010 0x4 0x20114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x70 0x0 0x40 0x70 0x8>;
					clock-names = "fck", "dbclk";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x20000 0x1000>;

					gpio@0 {
						compatible = "ti,am4372-gpio", "ti,omap4-gpio";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x6a 0x4>;
						gpio-controller;
						#gpio-cells = <0x2>;
						interrupt-controller;
						#interrupt-cells = <0x2>;
						status = "okay";
					};
				};

				target-module@22000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x22000 0x4 0x22010 0x4 0x22114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x7>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x78 0x0 0x40 0x78 0x8>;
					clock-names = "fck", "dbclk";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x22000 0x1000>;

					gpio@0 {
						compatible = "ti,am4372-gpio", "ti,omap4-gpio";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x94 0x4>;
						gpio-controller;
						#gpio-cells = <0x2>;
						interrupt-controller;
						#interrupt-cells = <0x2>;
						status = "okay";
					};
				};

				target-module@26000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x26000 0x4 0x26104 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					clocks = <0x43 0x0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x26000 0x1000>;

					vpfe@0 {
						compatible = "ti,am437x-vpfe";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x30 0x4>;
						status = "disabled";
					};
				};

				target-module@28000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x28000 0x4 0x28104 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-midle = <0x0 0x1 0x2>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					clocks = <0x43 0x8 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x28000 0x1000>;

					vpfe@0 {
						compatible = "ti,am437x-vpfe";
						reg = <0x0 0x2000>;
						interrupts = <0x0 0x32 0x4>;
						status = "disabled";
					};
				};

				target-module@2a000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x2a000 0x4 0x2a010 0x4 0x2a014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x3>;
					ti,syss-mask = <0x1>;
					clocks = <0x52 0x0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x2a000 0x400 0x400 0x2a400 0x400 0x800 0x2a800 0x400 0xc00 0x2ac00 0x400 0x1000 0x2b000 0x1000>;

					dss@0 {
						compatible = "ti,omap3-dss";
						reg = <0x0 0x200>;
						status = "disabled";
						clocks = <0x53>;
						clock-names = "fck";
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x400 0x400 0x400 0x400 0x800 0x800 0x400 0xc00 0xc00 0x400 0x1000 0x1000 0x1000>;

						target-module@400 {
							compatible = "ti,sysc-omap2", "ti,sysc";
							reg = <0x400 0x4 0x410 0x4 0x414 0x4>;
							reg-names = "rev", "sysc", "syss";
							ti,sysc-sidle = <0x0 0x1 0x2>;
							ti,sysc-midle = <0x0 0x1 0x2>;
							ti,sysc-mask = <0x307>;
							ti,syss-mask = <0x1>;
							clocks = <0x52 0x0 0x0>;
							clock-names = "fck";
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							ranges = <0x0 0x400 0x400>;

							dispc@0 {
								compatible = "ti,omap3-dispc";
								reg = <0x0 0x400>;
								interrupts = <0x0 0x7f 0x4>;
								clocks = <0x53>;
								clock-names = "fck";
								max-memory-bandwidth = <0xdb58580>;
							};
						};

						target-module@800 {
							compatible = "ti,sysc-omap2", "ti,sysc";
							reg = <0x800 0x4 0x810 0x4 0x814 0x4>;
							reg-names = "rev", "sysc", "syss";
							ti,sysc-sidle = <0x0 0x1 0x2>;
							ti,sysc-mask = <0x3>;
							ti,syss-mask = <0x1>;
							clocks = <0x52 0x0 0x0>;
							clock-names = "fck";
							#address-cells = <0x1>;
							#size-cells = <0x1>;
							ranges = <0x0 0x800 0x400>;

							rfbi@0 {
								compatible = "ti,omap3-rfbi";
								reg = <0x0 0x100>;
								clocks = <0x52 0x0 0x0>;
								clock-names = "fck";
								status = "disabled";
							};
						};
					};
				};

				target-module@3d000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x3d000 0x4 0x3d010 0x4 0x3d014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x148 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x3d000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x84 0x4>;
						status = "disabled";
					};
				};

				target-module@3f000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x3f000 0x4 0x3f010 0x4 0x3f014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x150 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x3f000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x85 0x4>;
						status = "disabled";
					};
				};

				target-module@41000 {
					compatible = "ti,sysc-omap4-timer", "ti,sysc";
					reg = <0x41000 0x4 0x41010 0x4 0x41014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x1>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x40 0x158 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x41000 0x1000>;

					timer@0 {
						compatible = "ti,am4372-timer", "ti,am335x-timer";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x86 0x4>;
						status = "disabled";
					};
				};

				target-module@45000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x45000 0x4 0x45110 0x4 0x45114 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x0 0x1 0x2>;
					ti,syss-mask = <0x1>;
					clocks = <0x40 0x100 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x45000 0x1000>;

					spi@0 {
						compatible = "ti,am4372-mcspi", "ti,omap4-mcspi";
						reg = <0x0 0x400>;
						interrupts = <0x0 0x89 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						status = "disabled";
					};
				};

				target-module@47000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x47000 0x4 0x47014 0x4 0x47018 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x3>;
					clocks = <0x40 0x80 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x47000 0x1000>;

					hdq@0 {
						compatible = "ti,am4372-hdq";
						reg = <0x0 0x1000>;
						interrupts = <0x0 0x8b 0x4>;
						clocks = <0x54>;
						clock-names = "fck";
						status = "disabled";
					};
				};

				target-module@4c000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x4c000 0x2000>;
				};

				target-module@80000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x80000 0x4 0x80010 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-mask = <0x10000>;
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x43 0x1f8 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x80000 0x20000>;

					omap_dwc3@0 {
						compatible = "ti,am437x-dwc3";
						reg = <0x0 0x10000>;
						interrupts = <0x0 0xac 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						utmi-mode = <0x1>;
						ranges = <0x0 0x0 0x20000>;

						usb@10000 {
							compatible = "snps,dwc3";
							reg = <0x10000 0x10000>;
							interrupts = <0x0 0xa8 0x4 0x0 0xa8 0x4 0x0 0xac 0x4>;
							interrupt-names = "peripheral", "host", "otg";
							phys = <0x55>;
							phy-names = "usb2-phy";
							maximum-speed = "high-speed";
							dr_mode = "otg";
							status = "disabled";
							snps,dis_u3_susphy_quirk;
							snps,dis_u2_susphy_quirk;
						};
					};
				};

				target-module@a8000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xa8000 0x4>;
					reg-names = "rev";
					clocks = <0x40 0x198 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xa8000 0x8000>;

					ocp2scp@0 {
						compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x8000>;

						phy@8000 {
							compatible = "ti,am437x-usb2";
							reg = <0x0 0x8000>;
							syscon-phy-power = <0x6 0x620>;
							clocks = <0x56 0x43 0x1f8 0x8>;
							clock-names = "wkupclk", "refclk";
							#phy-cells = <0x0>;
							status = "disabled";
							phandle = <0x55>;
						};
					};
				};

				target-module@c0000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xc0000 0x4 0xc0010 0x4>;
					reg-names = "rev", "sysc";
					ti,sysc-mask = <0x10000>;
					ti,sysc-midle = <0x0 0x1 0x2 0x3>;
					ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
					clocks = <0x43 0x200 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xc0000 0x20000>;

					omap_dwc3@0 {
						compatible = "ti,am437x-dwc3";
						reg = <0x0 0x10000>;
						interrupts = <0x0 0xb2 0x4>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						utmi-mode = <0x1>;
						ranges = <0x0 0x0 0x20000>;

						usb@10000 {
							compatible = "snps,dwc3";
							reg = <0x10000 0x10000>;
							interrupts = <0x0 0xae 0x4 0x0 0xae 0x4 0x0 0xb2 0x4>;
							interrupt-names = "peripheral", "host", "otg";
							phys = <0x57>;
							phy-names = "usb2-phy";
							maximum-speed = "high-speed";
							dr_mode = "otg";
							status = "disabled";
							snps,dis_u3_susphy_quirk;
							snps,dis_u2_susphy_quirk;
						};
					};
				};

				target-module@e8000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0xe8000 0x4>;
					reg-names = "rev";
					clocks = <0x40 0x1a0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xe8000 0x8000>;

					ocp2scp@0 {
						compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						ranges = <0x0 0x0 0x8000>;

						phy@8000 {
							compatible = "ti,am437x-usb2";
							reg = <0x0 0x8000>;
							syscon-phy-power = <0x6 0x628>;
							clocks = <0x58 0x43 0x200 0x8>;
							clock-names = "wkupclk", "refclk";
							#phy-cells = <0x0>;
							status = "disabled";
							phandle = <0x57>;
						};
					};
				};

				target-module@f2000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0xf2000 0x2000>;
				};
			};
		};

		interconnect@4a000000 {
			compatible = "ti,am4-l4-fast", "simple-bus";
			reg = <0x4a000000 0x800 0x4a000800 0x800 0x4a001000 0x400>;
			reg-names = "ap", "la", "ia0";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x4a000000 0x1000000>;

			segment@0 {
				compatible = "simple-bus";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x0 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x100000 0x100000 0x8000 0x108000 0x108000 0x1000 0x400000 0x400000 0x2000 0x402000 0x402000 0x1000 0x200000 0x200000 0x80000 0x280000 0x280000 0x1000>;

				target-module@100000 {
					compatible = "ti,sysc-omap4-simple", "ti,sysc";
					reg = <0x101200 0x4 0x101208 0x4 0x101204 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-mask = <0x0>;
					ti,sysc-midle = <0x0 0x1>;
					ti,sysc-sidle = <0x0 0x1>;
					ti,syss-mask = <0x1>;
					clocks = <0x59 0x0 0x0>;
					clock-names = "fck";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x100000 0x8000>;

					switch@0 {
						compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch";
						reg = <0x0 0x4000>;
						ranges = <0x0 0x0 0x4000>;
						clocks = <0x5a 0x5b>;
						clock-names = "fck", "50mclk";
						assigned-clocks = <0x5b>;
						assigned-clock-rates = <0x2faf080>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
						syscon = <0x6>;
						status = "disabled";
						interrupts = <0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
						interrupt-names = "rx_thresh", "rx", "tx", "misc";

						ethernet-ports {
							#address-cells = <0x1>;
							#size-cells = <0x0>;

							port@1 {
								reg = <0x1>;
								label = "port1";
								mac-address = [00 00 00 00 00 00];
								phys = <0x5c 0x1 0x0>;
							};

							port@2 {
								reg = <0x2>;
								label = "port2";
								mac-address = [00 00 00 00 00 00];
								phys = <0x5c 0x2 0x0>;
							};
						};

						mdio@1000 {
							compatible = "ti,am4372-mdio", "ti,cpsw-mdio", "ti,davinci_mdio";
							clocks = <0x5a>;
							clock-names = "fck";
							#address-cells = <0x1>;
							#size-cells = <0x0>;
							bus_freq = <0xf4240>;
							reg = <0x1000 0x100>;
						};

						cpts {
							clocks = <0x5d>;
							clock-names = "cpts";
						};
					};
				};

				target-module@200000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x200000 0x80000>;
				};

				target-module@400000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x400000 0x2000>;
				};
			};
		};

		emif@4c000000 {
			compatible = "ti,emif-am4372";
			reg = <0x4c000000 0x1000000>;
			ti,hwmods = "emif";
			interrupts = <0x0 0x65 0x4>;
			ti,no-idle;
			sram = <0x7 0x8>;
		};

		target-module@49000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49000000 0x4>;
			reg-names = "rev";
			clocks = <0x5e 0x58 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x49000000 0x10000>;

			dma@0 {
				compatible = "ti,edma3-tpcc";
				reg = <0x0 0x10000>;
				reg-names = "edma3_cc";
				interrupts = <0x0 0xc 0x4 0x0 0xd 0x4 0x0 0xe 0x4>;
				interrupt-names = "edma3_ccint", "edma3_mperr", "edma3_ccerrint";
				dma-requests = <0x40>;
				#dma-cells = <0x2>;
				ti,tptcs = <0x5f 0x7 0x60 0x5 0x61 0x0>;
				ti,edma-memcpy-channels = <0x3a 0x3b>;
				phandle = <0x32>;
			};
		};

		target-module@49800000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49800000 0x4 0x49800010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <0x1>;
			ti,sysc-midle = <0x0>;
			ti,sysc-sidle = <0x0 0x2>;
			clocks = <0x5e 0x60 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x49800000 0x100000>;

			dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0x0 0x100000>;
				interrupts = <0x0 0x70 0x4>;
				interrupt-names = "edma3_tcerrint";
				phandle = <0x5f>;
			};
		};

		target-module@49900000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49900000 0x4 0x49900010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <0x1>;
			ti,sysc-midle = <0x0>;
			ti,sysc-sidle = <0x0 0x2>;
			clocks = <0x5e 0x68 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x49900000 0x100000>;

			dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0x0 0x100000>;
				interrupts = <0x0 0x71 0x4>;
				interrupt-names = "edma3_tcerrint";
				phandle = <0x60>;
			};
		};

		target-module@49a00000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49a00000 0x4 0x49a00010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <0x1>;
			ti,sysc-midle = <0x0>;
			ti,sysc-sidle = <0x0 0x2>;
			clocks = <0x5e 0x70 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x49a00000 0x100000>;

			dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0x0 0x100000>;
				interrupts = <0x0 0x72 0x4>;
				interrupt-names = "edma3_tcerrint";
				phandle = <0x61>;
			};
		};

		target-module@47810000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x478102fc 0x4 0x47810110 0x4 0x47810114 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <0x307>;
			ti,sysc-sidle = <0x0 0x1 0x2>;
			ti,syss-mask = <0x1>;
			clocks = <0x43 0x1e0 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x47810000 0x1000>;

			mmc@0 {
				compatible = "ti,am437-sdhci";
				ti,needs-special-reset;
				interrupts = <0x0 0x1d 0x4>;
				reg = <0x0 0x1000>;
				status = "disabled";
			};
		};

		target-module@53100000 {
			compatible = "ti,sysc-omap3-sham", "ti,sysc";
			reg = <0x53100100 0x4 0x53100110 0x4 0x53100114 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <0x3>;
			ti,sysc-sidle = <0x0 0x1 0x2>;
			ti,syss-mask = <0x1>;
			clocks = <0x5e 0x38 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x53100000 0x1000>;

			sham@0 {
				compatible = "ti,omap5-sham";
				reg = <0x0 0x300>;
				dmas = <0x32 0x24 0x0>;
				dma-names = "rx";
				interrupts = <0x0 0x6d 0x4>;
			};
		};

		target-module@53501000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x53501080 0x4 0x53501084 0x4 0x53501088 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <0x3>;
			ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
			ti,syss-mask = <0x1>;
			clocks = <0x5e 0x8 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x53501000 0x1000>;

			aes@0 {
				compatible = "ti,omap4-aes";
				reg = <0x0 0xa0>;
				interrupts = <0x0 0x67 0x4>;
				dmas = <0x32 0x6 0x0 0x32 0x5 0x0>;
				dma-names = "tx", "rx";
			};
		};

		target-module@53701000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x53701030 0x4 0x53701034 0x4 0x53701038 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <0x3>;
			ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
			ti,syss-mask = <0x1>;
			clocks = <0x5e 0x10 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x53701000 0x1000>;

			des@0 {
				compatible = "ti,omap4-des";
				reg = <0x0 0xa0>;
				interrupts = <0x0 0x82 0x4>;
				dmas = <0x32 0x22 0x0 0x32 0x21 0x0>;
				dma-names = "tx", "rx";
			};
		};

		target-module@54400000 {
			compatible = "ti,sysc-pruss", "ti,sysc";
			reg = <0x54426000 0x4 0x54426004 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <0x30>;
			ti,sysc-midle = <0x0 0x1 0x2>;
			ti,sysc-sidle = <0x0 0x1 0x2>;
			clocks = <0x62 0x0 0x0>;
			clock-names = "fck";
			resets = <0x63 0x1>;
			reset-names = "rstctrl";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x54400000 0x80000>;

			pruss@0 {
				compatible = "ti,am4376-pruss1";
				reg = <0x0 0x40000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				memories@0 {
					reg = <0x0 0x2000 0x2000 0x2000 0x10000 0x8000>;
					reg-names = "dram0", "dram1", "shrdram2";
				};

				cfg@26000 {
					compatible = "ti,pruss-cfg", "syscon";
					reg = <0x26000 0x2000>;
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x26000 0x2000>;

					clocks {
						#address-cells = <0x1>;
						#size-cells = <0x0>;

						iepclk-mux@30 {
							reg = <0x30>;
							#clock-cells = <0x0>;
							clocks = <0x16 0x64>;
							phandle = <0x65>;
						};
					};
				};

				iep@2e000 {
					compatible = "ti,am3356-icss-iep";
					reg = <0x2e000 0x31c>;
					clocks = <0x65>;
				};

				ecap@30000 {
					compatible = "ti,pruss-ecap";
					reg = <0x30000 0x60>;
				};

				mii-rt@32000 {
					compatible = "ti,pruss-mii", "syscon";
					reg = <0x32000 0x58>;
				};

				interrupt-controller@20000 {
					compatible = "ti,pruss-intc";
					reg = <0x20000 0x2000>;
					interrupt-controller;
					#interrupt-cells = <0x3>;
					interrupts = <0x0 0x14 0x4 0x0 0x15 0x4 0x0 0x16 0x4 0x0 0x17 0x4 0x0 0x18 0x4 0x0 0x1a 0x4 0x0 0x1b 0x4>;
					interrupt-names = "host_intr0", "host_intr1", "host_intr2", "host_intr3", "host_intr4", "host_intr6", "host_intr7";
					ti,irqs-reserved = [20];
					phandle = <0x66>;
				};

				pru@34000 {
					compatible = "ti,am4376-pru";
					reg = <0x34000 0x3000 0x22000 0x400 0x22400 0x100>;
					reg-names = "iram", "control", "debug";
					firmware-name = "am437x-pru1_0-fw";
					interrupt-parent = <0x66>;
					interrupts = <0x10 0x2 0x2>;
					interrupt-names = "vring";
				};

				pru@38000 {
					compatible = "ti,am4376-pru";
					reg = <0x38000 0x3000 0x24000 0x400 0x24400 0x100>;
					reg-names = "iram", "control", "debug";
					firmware-name = "am437x-pru1_1-fw";
					interrupt-parent = <0x66>;
					interrupts = <0x12 0x3 0x3>;
					interrupt-names = "vring";
				};

				mdio@32400 {
					compatible = "ti,davinci_mdio";
					reg = <0x32400 0x90>;
					clocks = <0x15>;
					clock-names = "fck";
					bus_freq = <0xf4240>;
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					status = "disabled";
				};
			};

			pruss@40000 {
				compatible = "ti,am4376-pruss0";
				reg = <0x40000 0x40000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				memories@40000 {
					reg = <0x40000 0x1000 0x42000 0x1000>;
					reg-names = "dram0", "dram1";
				};

				cfg@66000 {
					compatible = "ti,pruss-cfg", "syscon";
					reg = <0x66000 0x2000>;
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x66000 0x2000>;

					clocks {
						#address-cells = <0x1>;
						#size-cells = <0x0>;

						iepclk-mux@30 {
							reg = <0x30>;
							#clock-cells = <0x0>;
							clocks = <0x16 0x64>;
							phandle = <0x67>;
						};
					};
				};

				iep@6e000 {
					compatible = "ti,am3356-icss-iep";
					reg = <0x6e000 0x31c>;
					clocks = <0x67>;
					status = "disabled";
				};

				mii-rt@72000 {
					compatible = "ti,pruss-mii", "syscon";
					reg = <0x72000 0x58>;
					status = "disabled";
				};

				interrupt-controller@60000 {
					compatible = "ti,pruss-intc";
					reg = <0x60000 0x2000>;
					interrupt-controller;
					#interrupt-cells = <0x3>;
					interrupts = <0x0 0x9f 0x4 0x0 0xa0 0x4 0x0 0xa1 0x4 0x0 0xa2 0x4 0x0 0xa3 0x4 0x0 0xa4 0x4 0x0 0xa5 0x4>;
					interrupt-names = "host_intr0", "host_intr1", "host_intr2", "host_intr3", "host_intr4", "host_intr6", "host_intr7";
					ti,irqs-reserved = [20];
					phandle = <0x68>;
				};

				pru@74000 {
					compatible = "ti,am4376-pru";
					reg = <0x74000 0x1000 0x62000 0x400 0x62400 0x100>;
					reg-names = "iram", "control", "debug";
					firmware-name = "am437x-pru0_0-fw";
					interrupt-parent = <0x68>;
					interrupts = <0x10 0x2 0x2>;
					interrupt-names = "vring";
				};

				pru@78000 {
					compatible = "ti,am4376-pru";
					reg = <0x78000 0x1000 0x64000 0x400 0x64400 0x100>;
					reg-names = "iram", "control", "debug";
					firmware-name = "am437x-pru0_1-fw";
					interrupt-parent = <0x68>;
					interrupts = <0x12 0x3 0x3>;
					interrupt-names = "vring";
				};
			};
		};

		gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			dmas = <0x32 0x34 0x0>;
			dma-names = "rxtx";
			clocks = <0x69>;
			clock-names = "fck";
			reg = <0x50000000 0x2000>;
			interrupts = <0x0 0x64 0x4>;
			gpmc,num-cs = <0x7>;
			gpmc,num-waitpins = <0x2>;
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			gpio-controller;
			#gpio-cells = <0x2>;
			status = "disabled";
		};

		target-module@47900000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x47900000 0x4 0x47900010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-sidle = <0x0 0x1 0x2 0x3>;
			clocks = <0x43 0x1f0 0x0>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x47900000 0x1000 0x30000000 0x30000000 0x4000000>;

			spi@0 {
				compatible = "ti,am4372-qspi";
				reg = <0x0 0x100 0x30000000 0x4000000>;
				reg-names = "qspi_base", "qspi_mmap";
				clocks = <0x6a>;
				clock-names = "fck";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				interrupts = <0x0 0x8a 0x4>;
				num-cs = <0x4>;
			};
		};

		sram@40300000 {
			compatible = "mmio-sram";
			reg = <0x40300000 0x40000>;
			ranges = <0x0 0x40300000 0x40000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;

			pm-code-sram@0 {
				compatible = "ti,sram";
				reg = <0x0 0x1000>;
				protect-exec;
				phandle = <0x7>;
			};

			pm-data-sram@1000 {
				compatible = "ti,sram";
				reg = <0x1000 0x1000>;
				pool;
				phandle = <0x8>;
			};
		};

		target-module@56000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x5600fe00 0x4 0x5600fe10 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <0x0 0x1 0x2>;
			ti,sysc-sidle = <0x0 0x1 0x2>;
			clocks = <0x6b 0x0 0x0>;
			clock-names = "fck";
			power-domains = <0x6c>;
			resets = <0x6c 0x0>;
			reset-names = "rstctrl";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x56000000 0x1000000>;

			gpu@0 {
				compatible = "ti,am4376-sgx530", "img,sgx530";
				reg = <0x0 0x10000>;
				interrupts = <0x0 0x25 0x4>;
				clocks = <0x6d>;
				clock-names = "fclk";
			};
		};
	};

	fixed-regulator-v24_0d {
		compatible = "regulator-fixed";
		regulator-name = "V24_0D";
		regulator-min-microvolt = <0x16e3600>;
		regulator-max-microvolt = <0x16e3600>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x6e>;
	};

	fixed-regulator-v3_3d {
		compatible = "regulator-fixed";
		regulator-name = "V3_3D";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x6e>;
		phandle = <0x2f>;
	};

	fixed-regulator-vdd_corereg {
		compatible = "regulator-fixed";
		regulator-name = "VDD_COREREG";
		regulator-min-microvolt = <0x10c8e0>;
		regulator-max-microvolt = <0x10c8e0>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x6e>;
		phandle = <0x6f>;
	};

	fixed-regulator-vdd_core {
		compatible = "regulator-fixed";
		regulator-name = "VDD_CORE";
		regulator-min-microvolt = <0x10c8e0>;
		regulator-max-microvolt = <0x10c8e0>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x6f>;
	};

	fixed-regulator-v1_8dreg {
		compatible = "regulator-fixed";
		regulator-name = "V1_8DREG";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x6e>;
		phandle = <0x70>;
	};

	fixed-regulator-v1_8d {
		compatible = "regulator-fixed";
		regulator-name = "V1_8D";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x70>;
	};

	fixed-regulator-v1_5dreg {
		compatible = "regulator-fixed";
		regulator-name = "V1_5DREG";
		regulator-min-microvolt = <0x16e360>;
		regulator-max-microvolt = <0x16e360>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x6e>;
		phandle = <0x71>;
	};

	fixed-regulator-v1_5d {
		compatible = "regulator-fixed";
		regulator-name = "V1_5D";
		regulator-min-microvolt = <0x16e360>;
		regulator-max-microvolt = <0x16e360>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x71>;
	};

	clk_32k_rtc {
		#clock-cells = <0x0>;
		compatible = "fixed-clock";
		clock-frequency = <0x8000>;
	};

	leds-iio {
		status = "okay";
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <0x72>;

		led-out0 {
			label = "out0";
			gpios = <0x73 0x3 0x0>;
			default-state = "off";
		};
	};
};

0 Bin Liu over 2 years ago in reply to piyush ghatole

TI__Guru**** 175361 points

Hi Piyush,

3692         leds-iio {                                                              
3693                 status = "okay";                                                
3694                 compatible = "gpio-leds";                                       
3695                 pinctrl-names = "default";                                      
3696                 pinctrl-0 = <0x72>;                                             
3697                                                                                 
3698                 led-out0 {                                                      
3699                         label = "out0";                                         
3700                         gpios = <0x73 0x3 0x0>;                                 
3701                         default-state = "off";                                  
3702                 };                                                              
3703         };

It seems gpio0_3 is used by the led driver.

Processors

Processors forum

AM4376: Controlling GPIO from User space /sys/class/gpio