16-bits DDR3 with Netra

Hello,

Please refer to the DDR3 Routing Guidelines in the device datasheet for details on using 16-bit DDRs.  CS0 can be used for both DDR memories.

Regards,
Marc

I used x16 DDR3 following way:

First memory chip:

DDR0: A0-A14, BA0-2, RASN, CASN, WEN, CSN0, CKE, ODT0, CLK0, RST, D0-7 with DQS0 and DQM0, D8-15 with DQS1 and DQM1

Second memory chip:

DDR0: A0-A14, BA0-2, RASN, CASN, WEN, CSN0, CKE, ODT0, CLK0, RST, D16-23 with DQS2 and DQM2, D24-31 with DQS3 and DQM3

Third memory chip:

DDR1: A0-A14, BA0-2, RASN, CASN, WEN, CSN0, CKE, ODT0, CLK0, RST, D0-7 with DQS0 and DQM0, D8-15 with DQS1 and DQM1

Fourth memory chip

DDR1: A0-A14, BA0-2, RASN, CASN, WEN, CSN0, CKE, ODT0, CLK0, RST, D16-23 with DQS2 and DQM2, D24-31 with DQS3 and DQM3

Have a look on my video which shows PCB layout od this x16 DDR3 implementation:

http://www.fedevel.com/welldoneblog/2011/07/altium-designer-ddr3-routing-and-pcb-layout-video/

This configuration boots up with original TI DDR3 settings.

Hi Robert,

Can you quote me the manufacturer part number of the RAM you are using?

Based on your mapping, it looks like you are accessing the RAM in 32 bits on controller DDR0, likewise on DDR1. Am I right on this?

Please advise.

Thanks and regards,

pb

Hi Poh,

yes, you are correct - 32bits on DDR0, 32bits on DDR1. I use 4x MT41J128M16HA-125 IT (1GB total).

http://www.micron.com/products/ProductDetails.html?product=products/dram/ddr3_sdram/MT41J128M16HA-125%20IT

Best regards,

- Robert

Hi All,

I would like to tap along to ask questions on DDR3 with NETRA.

I'm studying DM8168 datasheet, TRM and NETRA EVM (Rev F).

The EVM design uses 1GB DDR3 in eight x8 chips.

In my design, would like to build use 2GByte address space.

From DS, the max memory device capacity is 2Gbit, thus I need eight devices in total.

I'm also reading page 767 & 769 of SPRUGX8, and it looks like I have two options:

(a) Following page 767, using 16-bit DDR3, and use both CS0 and CS1 of DDR0 and DDR1.

(b) Following page 769, using 8-bit DDR3, and use only CS0 of DDR0 and DDR1. (Can follow the connections

Which one is a better design in overall?

Also in software implementation, which one is easier to make adapted?

We haven't start software development, but will refer to TI resources as start to develop.

I'm more on hardware side, and want some advice on software as to reduce potential pain in bringing up the PCB.

Thank you for answering my questions.

Regards,

Alex

Hi Robert,

Can you share with me your SDRAM register settings (TIMER 1 to 3, refresh and configuration registers) ince we are using the same DDR3 from Micron?

Are you setting the clock frequency at 796MHz?

Thanks and regards,

poh boon

Hi Poh,

1GB / 796MHz works with TI default settings - I didn't change anything in uboot. I had to change one register for 2GB / 796MHz:

/* For 2GB / 796 MHz */
//#define EMIF_TIM3   0x009F857F
//4Gb memory chips
#define EMIF_TIM3   0x009F8CDF

Best regards,

- Robert

Robert,

If I use your connection with MT41J256M16HA-125, it should provide a 2GB total space, am I right?

Regards,

Alex

yes, we have build option with 2GB. Tested (had to enable something in config to be able access more then 750MB)