TDA4VM-Q1: Questions about TDA4 CSI Dectection

Hi,

There isn't any register in CSIRX to check for incoming stream, you could probably check in PHY_STATUS register, it tells us if different lane states are detected in the PHY or not.

Same for CSITX. no register to check for outgoing stream..

Regards,

Brijesh

Hello，

So it seems inconvenient for us to debug video function. In other words, how can I know that TDA4 correctly received and sent a video stream? Could you give me some advice?

Hi,

MIPI protocol has its mechanism like CRC checker and also ECC on packet header to verify the video data. Can you please use this mechanism to check data validity?

Regards,

Brijesh

Which registers of the TDA4 can this information be reflected in?

Again, its not register, it is part of the header and footer information, that is passed with the CSI packet and CSIRX checks these packets and generates interrupt on error. 

One more question: How can I determine whether CSIRX/TX initialization is complete?

We are currently experiencing a problem. 9702 must have sent a MIPI signal into TDA4, but TDA4 seems to have no response. I just want to confirm whether TDA4 has received MIPI data. Currently, it is suspected that there is an initialization problem with TDA4 CSI.