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TDA4VM: SK TDA4VM and SDK RTOS v.8.4.0.6 set up to run using SBL app_single_cam not working

Part Number: TDA4VM
Other Parts Discussed in Thread: SYSBIOS

Hello,

We are currently working with SK TDA4VM and SDK RTOS v.8.4.0.6 set up to run using SBL.

We want to use app_single_cam application with a new sensor (lets call it IMX000). We have set up all the necessary files on imaging/sensor_drv and modified properly the "app_single_cam_common" files.

Right now, the logs through the UART doesn't seem to show any errors, but we have noticed that no image is being displayed on our screen. We know for a fact that the sensor is properly configured and is sending data through MIPI lines since we have tested this with another custom application for TDA4 that didn't use the imaging subsystem.

The logs printed are:

SBL Revision: 01.00.10.01 (Sep 2 2022 - 16:52:11)
TIFS ver: 22.1.1--v2022.01 (Terrific Llam
610585 s: CLI: Init ... !!!
[MCU2_0] 2.610629 s: CLI: Init ... Done !!!
[MCU2_0] 2.610659 s: SCICLIENT: Init ... !!!
[MCU2_0] 2.610961 s: SCICLIENT: DMSC FW version [22.1.1--v2022.01 (Terrific Llam]
[MCU2_0] 2.611015 s: SCICLIENT: DMSC FW revision 0x16
[MCU2_0] 2.611053 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0] 2.611093 s: SCICLIENT: Init ... Done !!!
[MCU2_0] 2.611126 s: UDMA: Init ... !!!
[MCU2_0] 2.612567 s: UDMA: Init ... Done !!!
[MCU2_0] 2.612630 s: MEM: Init ... !!!
[MCU2_0] 2.612676 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ b8000000 of size 536870912 bytes !!!
[MCU2_0] 2.612760 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!
[MCU2_0] 2.612838 s: MEM: Init ... Done !!!
[MCU2_0] 2.612869 s: IPC: Init ... !!!
[MCU2_0] 2.612938 s: IPC: 4 CPUs participating in IPC !!!
[MCU2_0] 2.612991 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0] 2.613031 s: IPC: HLOS is ready !!!
[MCU2_0] 2.623402 s: IPC: Init ... Done !!!
[MCU2_0] 2.623469 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0] 2.623519 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0] 2.623563 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0] 2.625169 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0] 2.625236 s: ETHFW: Init ... !!!
[MCU2_0] 2.633009 s: Warning: Using 6 MAC address(es) from static pool
[MCU2_0] 2.633131 s: ETHFW: Shared multicasts (software fanout):
[MCU2_0] 2.633181 s: 01:00:5e:00:00:01
[MCU2_0] 2.633328 s: 01:00:5e:00:00:fb
[MCU2_0] 2.633381 s: 01:00:5e:00:00:fc
[MCU2_0] 2.633431 s: 33:33:00:00:00:01
[MCU2_0] 2.633479 s: 33:33:ff:1d:92:c2
[MCU2_0] 2.633527 s: 01:80:c2:00:00:00
[MCU2_0] 2.633575 s: 01:80:c2:00:00:03
[MCU2_0] 2.633622 s: ETHFW: Reserved multicasts:
[MCU2_0] 2.633652 s: 01:80:c2:00:00:0e
[MCU2_0] 2.633700 s: 01:1b:19:00:00:00
[MCU2_0] 2.633984 s: EnetMcm: CPSW_9G on MAIN NAVSS
[MCU2_0] 2.646396 s:
[MCU2_0] ETHFW Version : 0.02.00
[MCU2_0] 2.646482 s: ETHFW Build Date: Oct 26, 2022
[MCU2_0] 2.646522 s: ETHFW Build Time: 16:41:33
[MCU2_0] 2.646552 s: ETHFW Commit SHA:
[MCU2_0] 2.646626 s: ETHFW: Init ... DONE !!!
[MCU2_0] 2.646661 s: ETHFW: Remove server Init ... !!!
[MCU2_0] 2.646902 s: CpswProxyServer: Virtual port configuration:
[MCU2_0] 2.646966 s: mpu_1_0 <-> Switch port 0: mpu_1_0_ethswitch-device-0
[MCU2_0] 2.647125 s: mcu_2_1 <-> Switch port 1: mcu_2_1_ethswitch-device-1
[MCU2_0] 2.647175 s: mpu_1_0 <-> MAC port 1: mpu_1_0_ethmac-device-1
[MCU2_0] 2.647220 s: mcu_2_1 <-> MAC port 4: mcu_2_1_ethmac-device-4
[MCU2_0] 2.648264 s: CpswProxyServer: initialization completed (core: mcu2_0)
[MCU2_0] 2.648332 s: ETHFW: Remove server Init ... DONE !!!
[MCU2_0] 2.649444 s: Starting lwIP, local interface IP is dhcp-enabled
[MCU2_0] 2.656158 s: Host MAC address: 70:ff:76:1d:92:c3
[MCU2_0] 2.660073 s: [LWIPIF_LWIP] Enet LLD netif initialized successfully
[MCU2_0] 2.691576 s: [LWIPIF_LWIP_IC] Interface started successfully
[MCU2_0] 2.691649 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS
[MCU2_0] 2.700841 s: FVID2: Init ... !!!
[MCU2_0] 2.700943 s: FVID2: Init ... Done !!!
[MCU2_0] 2.701708 s: DSS: Init ... !!!
[MCU2_0] 2.701739 s: DSS: Display type is eDP !!!
[MCU2_0] 2.701770 s: DSS: M2M Path is enabled !!!
[MCU2_0] 2.701942 s: DSS: SoC init ... !!!
[MCU2_0] 2.701983 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0] 2.702214 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.702257 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2
[MCU2_0] 2.702382 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.702421 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2
[MCU2_0] 2.702567 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.702605 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11
[MCU2_0] 2.702734 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0] 2.702775 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18
[MCU2_0] 2.703057 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0] 2.703105 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2
[MCU2_0] 2.703222 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0] 2.703265 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000
[MCU2_0] 2.704326 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0] 2.704380 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0
[MCU2_0] 2.704552 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0] 2.704596 s: DSS: SoC init ... Done !!!
[MCU2_0] 2.704626 s: DSS: Board init ... !!!
[MCU2_0] 2.704655 s: DSS: Board init ... Done !!!
[MCU2_0] 2.723691 s: src/fvid2_drvMgr.c @ Line 677:
[MCU2_0] 2.723743 s:
[MCU2_0] Fvid2_create
[MCU2_0] 2.723786 s: src/fvid2_drvMgr.c @ Line 702:
[MCU2_0] 2.724047 s: src/fvid2_drvMgr.c @ Line 707:
[MCU2_0] 2.724414 s: DSS: Init ... Done !!!
[MCU2_0] 2.724467 s: VHWA: VPAC Init ... !!!
[MCU2_0] 2.724500 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2
[MCU2_0] 2.724714 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.724757 s: VHWA: LDC Init ... !!!
[MCU2_0] 2.728956 s: VHWA: LDC Init ... Done !!!
[MCU2_0] 2.729021 s: VHWA: MSC Init ... !!!
[MCU2_0] 2.741647 s: VHWA: MSC Init ... Done !!!
[MCU2_0] 2.741715 s: VHWA: NF Init ... !!!
[MCU2_0] 2.743961 s: VHWA: NF Init ... Done !!!
[MCU2_0] 2.744026 s: VHWA: VISS Init ... !!!
[MCU2_0] 2.756027 s: VHWA: VISS Init ... Done !!!
[MCU2_0] 2.756096 s: VHWA: VPAC Init ... Done !!!
[MCU2_0] 2.756149 s: VX_ZONE_INIT:Enabled
[MCU2_0] 2.756180 s: VX_ZONE_ERROR:Enabled
[MCU2_0] 2.756210 s: VX_ZONE_WARNING:Enabled
[MCU2_0] 2.757613 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target MCU2-0
[MCU2_0] 2.758102 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target VPAC_NF
[MCU2_0] 2.758370 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target VPAC_LDC1
[MCU2_0] 2.758611 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target VPAC_MSC1
[MCU2_0] 2.759069 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target VPAC_MSC2
[MCU2_0] 2.759389 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target VPAC_VISS1
[MCU2_0] 2.759671 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE1
[MCU2_0] 2.760114 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE2
[MCU2_0] 2.760424 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DISPLAY1
[MCU2_0] 2.760702 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DISPLAY2
[MCU2_0] 2.761125 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CSITX
[MCU2_0] 2.761433 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE3
[MCU2_0] 2.761712 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE4
[MCU2_0] 2.762153 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE5
[MCU2_0] 2.762449 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE6
[MCU2_0] 2.762722 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE7
[MCU2_0] 2.763165 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target CAPTURE8
[MCU2_0] 2.763434 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DSS_M2M1
[MCU2_0] 2.763690 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DSS_M2M2
[MCU2_0] 2.764153 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DSS_M2M3
[MCU2_0] 2.764434 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DSS_M2M4
[MCU2_0] 2.764499 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0] 2.764702 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!!
[MCU2_0] 2.764748 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0] 2.787323 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0] 2.787383 s: CSI2RX: Init ... !!!
[MCU2_0] 2.787416 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0] 2.787567 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.787612 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2
[MCU2_0] 2.787786 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.787991 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2
[MCU2_0] 2.788154 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.788195 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2
[MCU2_0] 2.788313 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.788350 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2
[MCU2_0] 2.788462 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.788507 s:
[MCU2_0] Csirx_init
[MCU2_0] 2.788770 s:
[MCU2_0] CsirxDrv_init
[MCU2_0] 2.788999 s:
[MCU2_0] device_config = 0x8421064c
[MCU2_0] 2.789570 s: CSI2RX: Init ... Done !!!
[MCU2_0] 2.789628 s: CSI2TX: Init ... !!!
[MCU2_0] 2.789660 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0] 2.789782 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.789993 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2
[MCU2_0] 2.790169 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.790210 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2
[MCU2_0] 2.790343 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 2.791029 s: CSI2TX: Init ... Done !!!
[MCU2_0] 2.791123 s: ISS: Init ... !!!
[MCU2_0] 2.791176 s: ================================ IssSensor_IMX000_Init Start ================================================
[MCU2_0] 2.816203 s: [LWIPIF_LWIP_IC] Interface started successfully
[MCU2_0] 2.816285 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS
[MCU2_0] 2.816405 s: Added interface 'br4', IP is 0.0.0.0
[MCU2_0] 4.445844 s: IssSensor_Init ... Done !!!
[MCU2_0] 4.445995 s: IttRemoteServer_Init ... Done !!!
[MCU2_0] 4.446046 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0] 4.446133 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0] 4.446170 s: UDMA Copy: Init ... !!!
[MCU2_0] 4.448170 s: UDMA Copy: Init ... Done !!!
[MCU2_0] 4.448276 s: APP: Init ... Done !!!
[MCU2_0] 4.782873 s: [Info] Board init done!!!
[MCU2_0] 5.167977 s:
[MCU2_0] appRun
[MCU2_0] 5.168032 s: APP: Run ... !!!
[MCU2_0] 5.168064 s: IPC: Starting echo test ...
[MCU2_0] 5.170182 s:
[MCU2_0] 5.170235 s: --------------------
[MCU2_0] 5.170271 s: --------------------
[MCU2_0] 5.170299 s: --------------------
[MCU2_0] 5.170326 s: *********************** RUN app_single_cam_main!!!!!! ******************************
[MCU2_0] 5.170374 s: --------------------
[MCU2_0] 5.170400 s: --------------------
[MCU2_0] 5.170426 s: --------------------
[MCU2_0] 5.170452 s:
[MCU2_0] 5.180215 s: ISS: Enumerating sensors ... !!!
[MCU2_0] 5.180341 s:
[MCU2_0] 5.180383 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CREATE
[MCU2_0] 5.180665 s: I2C setupI2CInst done!!!!!!
[MCU2_0] 5.180702 s: ISS: Enumerating sensors ... found 0 : IMX000
[MCU2_0] 5.180754 s: Sensor selected : IMX000
[MCU2_0] 5.180795 s: Querying IMX000
[MCU2_0] 5.181039 s: ISS: Querying sensor [IMX000] ... !!!
[MCU2_0] 5.181095 s:
[MCU2_0] 5.181122 s:
[MCU2_0] 5.181162 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY
[MCU2_0] 5.181202 s: Received Query for IMX000
[MCU2_0] 5.181241 s: ISS: Querying sensor [IMX000] ... Done !!!
[MCU2_0] 5.181278 s: ISS: Initializing sensor [IMX000], doing IM_SENSOR_CMD_PWRON ... !!!
[MCU2_0] 5.181363 s:
[MCU2_0] 5.181400 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_PWRON
[MCU2_0] 5.181437 s: IM_SENSOR_CMD_PWRON : channel_mask = 0x2
[MCU2_0] 5.181538 s: ISS: Initializing sensor [IMX000], doing IM_SENSOR_CMD_CONFIG ... !!!
[MCU2_0] 5.181584 s:
[MCU2_0] 5.181605 s:
[MCU2_0] 5.181639 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CONFIG
[MCU2_0] 5.181676 s: Application requested features = 0x138
[MCU2_0]
[MCU2_0] 5.183029 s: IPC: Echo status: mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.]
[MCU2_0] 5.183147 s: IPC: Echo status: mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.]
[MCU2_0] 5.183243 s: IPC: Echo status: mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] - ALL PASSED !!!


[MCU2_0] 13.344852 s: IM_SENSOR_CMD_CONFIG returning status = 0
[MCU2_0] 13.344926 s: ISS: Initializing sensor [IMX000] ... Done !!!
[MCU2_0] 13.350091 s: app_create_viss : sensor_dcc_id = 000
[MCU2_0] 13.354765 s: Enabling LDC
[MCU2_0] 13.354993 s: Creating LDC
[MCU2_0] 13.425323 s: src/fvid2_drvMgr.c @ Line 677:
[MCU2_0] 13.425373 s:
[MCU2_0] Fvid2_create
[MCU2_0] 13.425422 s: src/fvid2_drvMgr.c @ Line 702:
[MCU2_0] 13.425458 s:
[MCU2_0] 13.425653 s:
[MCU2_0] CsirxDrv_create
[MCU2_0] 13.425772 s:
[MCU2_0] CsirxDrv_setCslCfgParams
[MCU2_0] 13.425891 s:
[MCU2_0] CSIRX_SetInfoIrqsMaskCfg
[MCU2_0] 13.425951 s:
[MCU2_0] CSIRX_SetErrorIrqsMaskCfg 0
[MCU2_0] 13.426000 s:
[MCU2_0] CSIRX_SetInfoIrqsMaskCfg 0
[MCU2_0] 13.426045 s:
[MCU2_0] device_config = 0x8421064c
[MCU2_0] 13.426081 s:
[MCU2_0] soft_reset = 0x0
[MCU2_0] 13.426116 s:
[MCU2_0] static_cfg = 0x43210410
[MCU2_0] 13.426151 s:
[MCU2_0] monitor_irqs = 0x0
[MCU2_0] 13.426185 s:
[MCU2_0] monitor_irqs_mask_cfg = 0x0
[MCU2_0] 13.426221 s:
[MCU2_0] info_irqs = 0x0
[MCU2_0] 13.426253 s:
[MCU2_0] info_irqs_mask_cfg = 0x0
[MCU2_0] 13.426287 s:
[MCU2_0] dphy_lane_control = 0x0
[MCU2_0] 13.426322 s:
[MCU2_0] dphy_status = 0x222206
[MCU2_0] 13.426355 s:
[MCU2_0] stream0_ctrl = 0x10
[MCU2_0] 13.426389 s:
[MCU2_0] stream0_status = 0x0
[MCU2_0] 13.426422 s:
[MCU2_0] stream0_data_cfg = 0x0
[MCU2_0] 13.426457 s:
[MCU2_0] stream0_cfg = 0x0
[MCU2_0] 13.426492 s:
[MCU2_0] stream0_monitor_ctrl = 0x0
[MCU2_0] 13.426529 s:
[MCU2_0] stream0_monitor_frame = 0x0
[MCU2_0] 13.426565 s:
[MCU2_0] stream0_monitor_lb = 0x0
[MCU2_0] 13.426600 s:
[MCU2_0] stream0_timer = 0x0
[MCU2_0] 13.426632 s:
[MCU2_0] stream0_fcc_cfg = 0x0
[MCU2_0] 13.426666 s:
[MCU2_0] stream0_fcc_ctrl = 0x0
[MCU2_0] 13.426700 s:
[MCU2_0] stream0_fifo_fill_lvl = 0x0
[MCU2_0] 13.426740 s:
[MCU2_0] CSIRX_GetInfoIrqsMaskCfg status = 0
[MCU2_0] 13.426776 s:
[MCU2_0] abortIrqm 0 = 0
[MCU2_0] 13.426856 s:
[MCU2_0] abortIrqm 1 = 0
[MCU2_0] 13.426896 s:
[MCU2_0] abortIrqm 2 = 0
[MCU2_0] 13.426930 s:
[MCU2_0] abortIrqm 3 = 0
[MCU2_0] 13.426961 s:
[MCU2_0] stopIrqm 0 = 0
[MCU2_0] 13.426997 s:
[MCU2_0] stopIrqm 1 = 0
[MCU2_0] 13.427030 s:
[MCU2_0] stopIrqm 2 = 0
[MCU2_0] 13.427063 s:
[MCU2_0] stopIrqm 3 = 0
[MCU2_0] 13.427098 s:
[MCU2_0] spGenericRcvdIrqm = 0
[MCU2_0] 13.427135 s:
[MCU2_0] deskewEntryIrqm = 0
[MCU2_0] 13.427167 s:
[MCU2_0] eccSparesNonzeroIrqm = 0
[MCU2_0] 13.427203 s:
[MCU2_0] wakeupIrqm = 0
[MCU2_0] 13.427237 s:
[MCU2_0] sleepIrqm = 0
[MCU2_0] 13.427270 s:
[MCU2_0] lpRcvdIrqm = 0
[MCU2_0] 13.427303 s:
[MCU2_0] spRcvdIrqm = 0
[MCU2_0] 13.427340 s:
[MCU2_0] CSIRX_SetInfoIrqsMaskCfg 0
[MCU2_0] 13.427384 s:
[MCU2_0] CSIRX_GetInfoIrqsMaskCfg status = 0
[MCU2_0] 13.427424 s:
[MCU2_0] lpRcvdIrqm = 1
[MCU2_0] 13.427456 s:
[MCU2_0] spRcvdIrqm = 1
[MCU2_0] 13.430180 s: src/fvid2_drvMgr.c @ Line 677:
[MCU2_0] 13.430230 s:
[MCU2_0] Fvid2_create
[MCU2_0] 13.430274 s: src/fvid2_drvMgr.c @ Line 702:
[MCU2_0] 13.430507 s:
[MCU2_0] CsirxDrv_create
[MCU2_0] 13.430631 s:
[MCU2_0] CsirxDrv_setCslCfgParams
[MCU2_0] 13.430690 s:
[MCU2_0] CSIRX_SetInfoIrqsMaskCfg
[MCU2_0] 13.430739 s:
[MCU2_0] CSIRX_SetErrorIrqsMaskCfg 0
[MCU2_0] 13.430788 s:
[MCU2_0] CSIRX_SetInfoIrqsMaskCfg 0
[MCU2_0] 13.430894 s:
[MCU2_0] device_config = 0x8421064c
[MCU2_0] 13.430936 s:
[MCU2_0] soft_reset = 0x0
[MCU2_0] 13.430970 s:
[MCU2_0] static_cfg = 0x43210410
[MCU2_0] 13.431004 s:
[MCU2_0] monitor_irqs = 0x0
[MCU2_0] 13.431039 s:
[MCU2_0] monitor_irqs_mask_cfg = 0x0
[MCU2_0] 13.431075 s:
[MCU2_0] info_irqs = 0x0
[MCU2_0] 13.431110 s:
[MCU2_0] info_irqs_mask_cfg = 0x0
[MCU2_0] 13.431144 s:
[MCU2_0] dphy_lane_control = 0x0
[MCU2_0] 13.431180 s:
[MCU2_0] dphy_status = 0x222206
[MCU2_0] 13.431214 s:
[MCU2_0] stream0_ctrl = 0x10
[MCU2_0] 13.431249 s:
[MCU2_0] stream0_status = 0x0
[MCU2_0] 13.431284 s:
[MCU2_0] stream0_data_cfg = 0x0
[MCU2_0] 13.431319 s:
[MCU2_0] stream0_cfg = 0x0
[MCU2_0] 13.431353 s:
[MCU2_0] stream0_monitor_ctrl = 0x0
[MCU2_0] 13.431390 s:
[MCU2_0] stream0_monitor_frame = 0x0
[MCU2_0] 13.431424 s:
[MCU2_0] stream0_monitor_lb = 0x0
[MCU2_0] 13.431459 s:
[MCU2_0] stream0_timer = 0x0
[MCU2_0] 13.431493 s:
[MCU2_0] stream0_fcc_cfg = 0x0
[MCU2_0] 13.431528 s:
[MCU2_0] stream0_fcc_ctrl = 0x0
[MCU2_0] 13.431562 s:
[MCU2_0] stream0_fifo_fill_lvl = 0x0
[MCU2_0] 13.431602 s:
[MCU2_0] CSIRX_GetInfoIrqsMaskCfg status = 0
[MCU2_0] 13.431641 s:
[MCU2_0] abortIrqm 0 = 0
[MCU2_0] 13.431672 s:
[MCU2_0] abortIrqm 1 = 0
[MCU2_0] 13.431705 s:
[MCU2_0] abortIrqm 2 = 0
[MCU2_0] 13.431738 s:
[MCU2_0] abortIrqm 3 = 0
[MCU2_0] 13.431769 s:
[MCU2_0] stopIrqm 0 = 0
[MCU2_0] 13.431840 s:
[MCU2_0] stopIrqm 1 = 0
[MCU2_0] 13.431880 s:
[MCU2_0] stopIrqm 2 = 0
[MCU2_0] 13.431914 s:
[MCU2_0] stopIrqm 3 = 0
[MCU2_0] 13.431949 s:
[MCU2_0] spGenericRcvdIrqm = 0
[MCU2_0] 13.431986 s:
[MCU2_0] deskewEntryIrqm = 0
[MCU2_0] 13.432021 s:
[MCU2_0] eccSparesNonzeroIrqm = 0
[MCU2_0] 13.432057 s:
[MCU2_0] wakeupIrqm = 0
[MCU2_0] 13.432090 s:
[MCU2_0] sleepIrqm = 0
[MCU2_0] 13.432121 s:
[MCU2_0] lpRcvdIrqm = 0
[MCU2_0] 13.432155 s:
[MCU2_0] spRcvdIrqm = 0
[MCU2_0] 13.432192 s:
[MCU2_0] CSIRX_SetInfoIrqsMaskCfg 0
[MCU2_0] 13.432233 s:
[MCU2_0] CSIRX_GetInfoIrqsMaskCfg status = 0
[MCU2_0] 13.432273 s:
[MCU2_0] lpRcvdIrqm = 1
[MCU2_0] 13.432307 s:
[MCU2_0] spRcvdIrqm = 1
[MCU2_0] 13.436551 s: src/fvid2_drvMgr.c @ Line 677:
[MCU2_0] 13.436600 s:
[MCU2_0] Fvid2_create
[MCU2_0] 13.436647 s: src/fvid2_drvMgr.c @ Line 702:
[MCU2_0] 13.447336 s: src/fvid2_drvMgr.c @ Line 677:
[MCU2_0] 13.447384 s:
[MCU2_0] Fvid2_create
[MCU2_0] 13.447432 s: src/fvid2_drvMgr.c @ Line 702:
[MCU2_0] 13.461529 s: Scaler is enabled
[MCU2_0] 13.471439 s:
[MCU2_0] 13.471471 s:
[MCU2_0] 17.010863 s: ISS: Starting sensor [IMX000] ... !!!
[MCU2_0] 17.011376 s: VX_ZONE_WARNING:[tivxCaptureSetTimeout:786] CAPTURE: WARNING: Error frame not provided using tivxCaptureRegisterErrorFrame, defaulting to waiting forever !!!
[MCU2_1] 2.623518 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1] 2.623686 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1] 2.625080 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1] 2.625138 s: FVID2: Init ... !!!
[MCU2_1] 2.625207 s: FVID2: Init ... Done !!!
[MCU2_1] 2.625238 s: VHWA: DMPAC: Init ... !!!
[MCU2_1] 2.625265 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2
[MCU2_1] 2.628713 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1] 2.628756 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2
[MCU2_1] 2.629305 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1] 2.629344 s: VHWA: DOF Init ... !!!
[MCU2_1] 2.638069 s: VHWA: DOF Init ... Done !!!
[MCU2_1] 2.638140 s: VHWA: SDE Init ... !!!
[MCU2_1] 2.640819 s: VHWA: SDE Init ... Done !!!
[MCU2_1] 2.640878 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1] 2.640926 s: VX_ZONE_INIT:Enabled
[MCU2_1] 2.640956 s: VX_ZONE_ERROR:Enabled
[MCU2_1] 2.640985 s: VX_ZONE_WARNING:Enabled
[MCU2_1] 2.642172 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DMPAC_SDE
[MCU2_1] 2.642428 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target DMPAC_DOF
[MCU2_1] 2.642658 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:64] Added target MCU2-1
[MCU2_1] 2.642717 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1] 2.642754 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1] 2.643030 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1] 2.643074 s: UDMA Copy: Init ... !!!
[MCU2_1] 2.644941 s: UDMA Copy: Init ... Done !!!
[MCU2_1] 2.645006 s: APP: Init ... Done !!!
[MCU2_1] 2.645037 s:
[MCU2_1] appRun
[MCU2_1] 2.645058 s: APP: Run ... !!!
[MCU2_1] 2.645080 s: IPC: Starting echo test ...
[MCU2_1] 2.646816 s: APP: Run ... Done !!!
[MCU2_1] 2.647734 s: IPC: Echo status: mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.]
[MCU2_1] 2.647841 s: IPC: Echo status: mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P]
[MCU2_1] 5.183563 s: IPC: Echo status: mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] - ALL PASSED !!!
[C6x_1 ] 2.623518 s: APP: Syncing with 4 CPUs ... Done !!!
[C6x_1 ] 2.623534 s: REMOTE_SERVICE: Init ... !!!
[C6x_1 ] 2.624118 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_1 ] 2.624152 s: VX_ZONE_INIT:Enabled
[C6x_1 ] 2.624164 s: VX_ZONE_ERROR:Enabled
[C6x_1 ] 2.624173 s: VX_ZONE_WARNING:Enabled
[C6x_1 ] 2.624862 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_1 ] 2.624880 s: APP: OpenVX Target kernel init ... !!!
[C6x_1 ] 2.625210 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_1 ] 2.625232 s: UDMA Copy: Init ... !!!
[C6x_1 ] 2.631930 s: UDMA Copy: Init ... Done !!!
[C6x_1 ] 2.631947 s: APP: Init ... Done !!!
[C6x_1 ] 2.631956 s:
[C6x_1 ] appRun
[C6x_1 ] 2.631963 s: APP: Run ... !!!
[C6x_1 ] 2.631971 s: IPC: Starting echo test ...
[C6x_1 ] 2.632635 s: APP: Run ... Done !!!
[C6x_1 ] 2.633387 s: IPC: Echo status: mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P]
[C6x_1 ] 2.647548 s: IPC: Echo status: mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P]
[C6x_1 ] 5.183443 s: IPC: Echo status: mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] - ALL PASSED !!!
[C6x_2 ] 2.623519 s: APP: Syncing with 4 CPUs ... Done !!!
[C6x_2 ] 2.623535 s: REMOTE_SERVICE: Init ... !!!
[C6x_2 ] 2.624114 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_2 ] 2.624149 s: VX_ZONE_INIT:Enabled
[C6x_2 ] 2.624160 s: VX_ZONE_ERROR:Enabled
[C6x_2 ] 2.624170 s: VX_ZONE_WARNING:Enabled
[C6x_2 ] 2.624854 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_2 ] 2.624871 s: APP: OpenVX Target kernel init ... !!!
[C6x_2 ] 2.625214 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_2 ] 2.625238 s: UDMA Copy: Init ... !!!
[C6x_2 ] 2.632317 s: UDMA Copy: Init ... Done !!!
[C6x_2 ] 2.632336 s: APP: Init ... Done !!!
[C6x_2 ] 2.632344 s:
[C6x_2 ] appRun
[C6x_2 ] 2.632352 s: APP: Run ... !!!
[C6x_2 ] 2.632361 s: IPC: Starting echo test ...
[C6x_2 ] 2.633137 s: APP: Run ... Done !!!
[C6x_2 ] 2.633381 s: IPC: Echo status: mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s]
[C6x_2 ] 2.647572 s: IPC: Echo status: mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s]
[C6x_2 ] 5.183489 s: IPC: Echo status: mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] - ALL PASSED !!!

1- OUR MAIN QUESTION: Is there anything we are missing? There seem to be no errors on the logs.

By further investigation, we have found that the application gets stucked when calling retVal = SemaphoreP_pend((SemaphoreP_handle)event, bsp_timeout) on tivxEventWait (Called from tivxCaptureProcess from vx_capture_target.c) is that normal?

2- A less important question: As seen in the logs, DSS: Display type is eDP !!!.Can we use HDMI port to see image instead of eDP?

Thank you,

  •  Hi,

    [MCU2_0] 2.764702 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!!

    Are you using OpenVX host on R5f?
    I see you are testing the same on SDK 8.4.

    Note : OpenVX host on R5F is currently not supported on the SDK. This is just a Proof of concept which has been tested on SDK 8.1.

    Is it possible to test the same on SDK 8.1 at your end?

    As seen in the logs, DSS: Display type is eDP !!!.Can we use HDMI port to see image instead of eDP?

    Yes, you could define the macro ENABLE_DSS_HDMI and undef the macro ENABLE_DSS_EDP  in ${PSDKRA}/vision_apps/platform/j721e/rtos/common/app_cfg_mcu2_0.h and rebuild the vision_apps.

    Regards,
    Nikhil

  • Hello Nikhil,

    As you mentioned, we are trying to prepare SDK 8.1 by following the "Proof of Concept Enablement for OpenVx Host on R5F (MCU2_0)" application note.

    We have followed the steps but we have some questions:

    1. How should we prepare the SD card (just a FAT32 partition?)
    2. The Application note states that we should copy some files, but we don't know where should we copy them:
      1. Where should we copy the .dtbo files stored at ${PSDKL_PATH}/board-support/ linux-5.10.65+gitAUTOINC+dcc6bedb2c-gdcc6bedb2c/arch/arm64/boot/dts/ti/ ?
      2. Where should we copy the image file stored at ${PSDKL_PATH}/board-support/ linux-5.10.65+gitAUTOINC+dcc6bedb2c-gdcc6bedb2c/arch/arm64/boot/ ?
    3. What should we do with the RTOS, Linux executables:
      1. vision_apps/out/J7/A72/LINUX/$PROFILE
      2. vision_apps/out/J7/R5F/$(RTOS)/$PROFILE
      3. vision_apps/out/J7/C66/SYSBIOS/$PROFILE
      4. vision_apps/out/J7/C71/SYSBIOS/$PROFILE
    4. Is there any additional guide that we should follow?

    Thank you,

    David

  • Hi David,

    How should we prepare the SD card (just a FAT32 partition?)

    You could prepare the SD card, the usual way how you prepare for the SDK to run the vision_apps demo as mentioned in the below link

    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/08_01_00_11/exports/docs/vision_apps/docs/user_guide/RUN_INSTRUCTIONS.html#:~:text=Linux%2BRTOS%20mode%20as%20mentioned%20in%20Build%20Instructions-,Step%201%3A%20Prepare%20SD%20card%20for%20boot%20(one%20time%20only),-Warning

    Where should we copy the .dtbo files stored at ${PSDKL_PATH}/board-support/ linux-5.10.65+gitAUTOINC+dcc6bedb2c-gdcc6bedb2c/arch/arm64/boot/dts/ti/ ?
    Where should we copy the image file stored at ${PSDKL_PATH}/board-support/ linux-5.10.65+gitAUTOINC+dcc6bedb2c-gdcc6bedb2c/arch/arm64/boot/ ?

    Please copy both Image and .dtbo file to the SD Card in rootfs/boot/ folder.

    What should we do with the RTOS, Linux executables:
    1. vision_apps/out/J7/A72/LINUX/$PROFILE
    2. vision_apps/out/J7/R5F/$(RTOS)/$PROFILE
    3. vision_apps/out/J7/C66/SYSBIOS/$PROFILE
    4. vision_apps/out/J7/C71/SYSBIOS/$PROFILE

    The R5F binary here would consist of the demo to be run. Please copy these executables to the SD card as mentioned in the below link (again same as how it is done to run any vision_apps demo)

    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/08_01_00_11/exports/docs/vision_apps/docs/user_guide/RUN_INSTRUCTIONS.html#:~:text=SD%20card%20installation-,Step%203%3A%20Copy%20executable%20files%20to%20SD%20card%20(first%20time%20and%20each%20time%20you%20want%20to%20run%20updated%20applications),-Note

    Is there any additional guide that we should follow?

    For SDK 8.1, there are no additional documents required to be followed or no additional changes required.

    Following the App note should be sufficient.

    But since this was a proof of concept and has not been tested for the later versions, there may be additional changes required based on the issues being faced.

    As mentioned in the app note, Porting the patches to the later versions of SDK is currently not a part of TI's plan.

    Regards,
    Nikhil.

  • Hello Nikhil,

    We have followed your instructions and everything compiles now.

    Despite that, when trying to run the application, the following happens:

    root@tda4vm-sk:/opt/vision_apps# source ./vision_apps_init.sh

    root@tda4vm-sk:/opt/vision_apps# [MCU2_0]      3.762847 s: CIO: Init ... Done !!!

    [MCU2_0]      3.762918 s: ### CPU Frequency = 1000000000 Hz

    [MCU2_0]      3.762962 s: APP: Init ... !!!

    [MCU2_0]      3.762991 s: SCICLIENT: Init ... !!!

    [MCU2_0]      3.763257 s: SCICLIENT: DMSC FW version [22.1.1--v2022.01 (Terrific Llam]

    [MCU2_0]      3.763310 s: SCICLIENT: DMSC FW revision 0x16

    [MCU2_0]      3.763349 s: SCICLIENT: DMSC FW ABI revision 3.1

    [MCU2_0]      3.763386 s: SCICLIENT: Init ... Done !!!

    [MCU2_0]      3.763415 s: UDMA: Init ... !!!

    [MCU2_0]      3.764713 s: UDMA: Init ... Done !!!

    [MCU2_0]      3.764775 s: MEM: Init ... !!!

    [MCU2_0]      3.764818 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ b8000000 of size 536870912 bytes !!!

    [MCU2_0]      3.764899 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!

    [MCU2_0]      3.764967 s: MEM: Init ... Done !!!

    [MCU2_0]      3.764996 s: IPC: Init ... !!!

    [MCU2_0]      3.765064 s: IPC: 6 CPUs participating in IPC !!!

    [MCU2_0]      3.765117 s: IPC: Waiting for HLOS to be ready ... !!!

    [MCU2_1]      3.707457 s: CIO: Init ... Done !!!

    [MCU2_1]      3.707527 s: ### CPU Frequency = 1000000000 Hz

    [MCU2_1]      3.707572 s: APP: Init ... !!!

    [MCU2_1]      3.707597 s: SCICLIENT: Init ... !!!

    [MCU2_1]      3.707847 s: SCICLIENT: DMSC FW version [22.1.1--v2022.01 (Terrific Llam]

    [MCU2_1]      3.707895 s: SCICLIENT: DMSC FW revision 0x16

    [MCU2_1]      3.707928 s: SCICLIENT: DMSC FW ABI revision 3.1

    [MCU2_1]      3.707964 s: SCICLIENT: Init ... Done !!!

    [MCU2_1]      3.708004 s: UDMA: Init ... !!!

    [MCU2_1]      3.709428 s: UDMA: Init ... Done !!!

    [MCU2_1]      3.709491 s: MEM: Init ... !!!

    [MCU2_1]      3.709537 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!

    [MCU2_1]      3.709614 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!!

    [MCU2_1]      3.709675 s: MEM: Init ... Done !!!

    [MCU2_1]      3.709700 s: IPC: Init ... !!!

    [MCU2_1]      3.709764 s: IPC: 6 CPUs participating in IPC !!!

    [MCU2_1]      3.709813 s: IPC: Waiting for HLOS to be ready ... !!!

    [C6x_1 ]      3.769259 s: CIO: Init ... Done !!!

    [C6x_1 ]      3.769284 s: ### CPU Frequency = 1350000000 Hz

    [C6x_1 ]      3.769295 s: APP: Init ... !!!

    [C6x_1 ]      3.769302 s: SCICLIENT: Init ... !!!

    [C6x_1 ]      3.769529 s: SCICLIENT: DMSC FW version [22.1.1--v2022.01 (Terrific Llam]

    [C6x_1 ]      3.769541 s: SCICLIENT: DMSC FW revision 0x16

    [C6x_1 ]      3.769550 s: SCICLIENT: DMSC FW ABI revision 3.1

    [C6x_1 ]      3.769560 s: SCICLIENT: Init ... Done !!!

    [C6x_1 ]      3.769568 s: UDMA: Init ... !!!

    [C6x_1 ]      3.770934 s: UDMA: Init ... Done !!!

    [C6x_1 ]      3.770956 s: MEM: Init ... !!!

    [C6x_1 ]      3.770969 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!!

    [C6x_1 ]      3.770986 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!

    [C6x_1 ]      3.771001 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ dd000000 of size 50331648 bytes !!!

    [C6x_1 ]      3.771017 s: MEM: Init ... Done !!!

    [C6x_1 ]      3.771026 s: IPC: Init ... !!!

    [C6x_1 ]      3.771045 s: IPC: 6 CPUs participating in IPC !!!

    [C6x_1 ]      3.771059 s: IPC: Waiting for HLOS to be ready ... !!!

    [C6x_2 ]      3.855442 s: CIO: Init ... Done !!!

    [C6x_2 ]      3.855466 s: ### CPU Frequency = 1350000000 Hz

    [C6x_2 ]      3.855477 s: APP: Init ... !!!

    [C6x_2 ]      3.855485 s: SCICLIENT: Init ... !!!

    [C6x_2 ]      3.855703 s: SCICLIENT: DMSC FW version [22.1.1--v2022.01 (Terrific Llam]

    [C6x_2 ]      3.855716 s: SCICLIENT: DMSC FW revision 0x16

    [C6x_2 ]      3.855726 s: SCICLIENT: DMSC FW ABI revision 3.1

    [C6x_2 ]      3.855736 s: SCICLIENT: Init ... Done !!!

    [C6x_2 ]      3.855745 s: UDMA: Init ... !!!

    [C6x_2 ]      3.857158 s: UDMA: Init ... Done !!!

    [C6x_2 ]      3.857180 s: MEM: Init ... !!!

    [C6x_2 ]      3.857193 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e0000000 of size 16777216 bytes !!!

    [C6x_2 ]      3.857211 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!

    [C6x_2 ]      3.857226 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e1000000 of size 50331648 bytes !!!

    [C6x_2 ]      3.857243 s: MEM: Init ... Done !!!

    [C6x_2 ]      3.857251 s: IPC: Init ... !!!

    [C6x_2 ]      3.857272 s: IPC: 6 CPUs participating in IPC !!!

    [C6x_2 ]      3.857286 s: IPC: Waiting for HLOS to be ready ... !!!

    [C7x_1 ]      4.071156 s: CIO: Init ... Done !!!

    [C7x_1 ]      4.071171 s: ### CPU Frequency = 1000000000 Hz

    [C7x_1 ]      4.071181 s: APP: Init ... !!!

    [C7x_1 ]      4.071189 s: SCICLIENT: Init ... !!!

    [C7x_1 ]      4.071396 s: SCICLIENT: DMSC FW version [22.1.1--v2022.01 (Terrific Llam]

    [C7x_1 ]      4.071410 s: SCICLIENT: DMSC FW revision 0x16

    [C7x_1 ]      4.071420 s: SCICLIENT: DMSC FW ABI revision 3.1

    [C7x_1 ]      4.071430 s: SCICLIENT: Init ... Done !!!

    [C7x_1 ]      4.071439 s: UDMA: Init ... !!!

    [C7x_1 ]      4.072518 s: UDMA: Init ... Done !!!

    [C7x_1 ]      4.072530 s: MEM: Init ... !!!

    [C7x_1 ]      4.072540 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ 100000000 of size 268435456 bytes !!!

    [C7x_1 ]      4.072561 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!!

    [C7x_1 ]      4.072578 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!

    [C7x_1 ]      4.072595 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!

    [C7x_1 ]      4.072612 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e4000000 of size 402653184 bytes !!!

    [C7x_1 ]      4.072630 s: MEM: Init ... Done !!!

    [C7x_1 ]      4.072638 s: IPC: Init ... !!!

    [C7x_1 ]      4.072650 s: IPC: 6 CPUs participating in IPC !!!

    [C7x_1 ]      4.072664 s: IPC: Waiting for HLOS to be ready ... !!!

    How can we solve this?

    Best regards,

  • Hi,

    There seems to be some hang in the Linux logs as all the cores are Waiting for HLOS to be ready.

    You would have to check the Linux boot logs to see if the cores are loaded correctly. This is the SBL boot flow right? So i believe you would be using combined app image to load the firmwares?

    But since this was a proof of concept and has not been tested for the later versions, there may be additional changes required based on the issues being faced

    Again, I would like to stress on the above point that this has not been tested on the later versions. This has been verified for SPL boot flow in SDK 8.1 for IMX390 cameras. Hence, it might require additional changes in the code which would have to be identified from your end.

    Note : I would also request you to refer the application notes document and look into the Limitation Section before you proceed further to identify whether this feature in its current form matches your requirement.

    Regards,
    Nikhil