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TDA4VM: The timer cycle created by TimerP is not accurate

Part Number: TDA4VM

TI Expert

I use TimerP to create a timer with a cycle of 50us. I find that the cycle is accurate most of the time, but the actual cycle often changes to 33us, 45us, or even 100us. Why is this?
The following is the code for creating a timer:
TimerP_Params_init(&timerParams);
timerParams.periodType = TimerP_PeriodType_MICROSECS;
timerParams.startMode = TimerP_StartMode_USER;
timerParams.runMode = TimerP_RunMode_CONTINUOUS;
//timerParams.intfreqLo = 19200000;
//timerParams.intfreqHi = 0;
//timerParams.extfreqLo = 19200000;
//timerParams.extfreqHi = 0;
timerParams.period = 50;

UssTimerhandle = TimerP_create(TimerP_ANY, (TimerP_Fxn)timerIoSetIsr,&timerParams);

static void timerIoSetIsr(void)
{


isrcur_time = appLogGetGlobalTimeInUsec;
timearry[pos_i] = isrcur_time - isrpre_time;
isrpre_time = isrcur_time;

uintptr_t key = HwiP_disable();
if(UssTimerhandle != NULL)
{
... ...
Gpio  statuc switching
... ...
}
pos_i++;
HwiP_restore(key);
}

Print the value of timearray [], which can have 33us, 45us, or even 100us, etc

  • Hi,TI Expert

    I run the same code on another r5f core, there will be no cycle inaccuracies. What causes the timer's cycle to be inaccurate?

  • Hi jia wentao,

    On which core are you seeing this inaccuracies? Is there anything else high priority running on this core? 

    Regards,

    Brijesh

  • On which core are you seeing this inaccuracies? Is there anything else high priority running on this core?
    ===》
    1. This timer runs on mcu3_ 0, mcu3_ 0 also runs programs such as IPC, gpio+UDMA data handling. Will these programs cause a blockage in timer operation?
    Ipc, GPIO+UDMA will run on three different threads with the same priority and a priority of 12.
    I didn't set the priority of timer because I couldn't find the place to set the priority.
    2. The same program runs on mcu3_1, and the timer runs accurately. [mcu3_1 only runs this timer test program]

    Regards,

    jiawentao

  • Hi jiawentao,

    Yes, if there are a lot of interrupts from UDMA or IPC or ISR processing is taking time in UDMA or interrupt is disabled in some critical processing for longer duration, timer isr can get delayed.

    Regards,

    Brijesh 

  • Hi Brijesh,
    Yes, if there are a lot of interrupts from UDMA or IPC or ISR processing is taking time in UDMA or interrupt is disabled in some critical processing for longer duration, timer isr can get delayed.
    ==>> Yes, we use GPIO interrupts in this core to trigger UDMA to grab data, and the data will be sent to other CPU cores through the IPC. Is there any optimization method to make the timer accurate in this situation? Can timer increase priority?
    Regards,

    jiawentao

  • Hi jiawentao,

    Yes, can you try increasing priority of the timer interrupt? Not sure how much it will help, but can you please try it ?

    Regards,

    Brijesh

  • Hi Brijesh,
    Yes, can you try increasing priority of the timer interrupt? Not sure how much it will help, but can you please try it ?
    ===>>> Sorry, I can't find a way to set the priority of timer. Can you tell me how to set it up?
    jiawentao

  • Hi Brijesh,
    Is there any information that can be feedback?
    Regards,
    jiawentao

  • Hi jiawentao,

    Can you please check timer implementation for noos in the file ti-processor-sdk-rtos-j721e-evm-08_05_00_11\pdk_jacinto_08_05_00_36\packages\ti\osal\src\nonos\timer\v1\TimerP_nonos.c ? This is where timep APIs are implemented. In the Init API, it registers interrupt handler for the timer, this is where you need to increase timer priority. 

    Please note i have assumed that you are using FreeRTOS on R5F, ie SDK 8.0 or later.

    Regards,

    Brijesh

  • Hi jiawentao,

    Can you please check timer implementation for noos in the file ti-processor-sdk-rtos-j721e-evm-08_05_00_11\pdk_jacinto_08_05_00_36\packages\ti\osal\src\nonos\timer\v1\TimerP_nonos.c ? This is where timep APIs are implemented. In the Init API, it registers interrupt handler for the timer, this is where you need to increase timer priority. 

    Please note i have assumed that you are using FreeRTOS on R5F, ie SDK 8.0 or later.

    Regards,

    Brijesh

  • Hi,Brijesh

    ok, I'll try to modify it, and feedback will be provided as soon as possible. Thank you!

  • Hi Brijesh,
    I am using version 8.2 of the SDK. I have modified the priority in the init API, but the timer cycle is still sometimes inaccurate.
    Are there any other suggestions for solving the problem?
    Regards,
    jiawentao

  • Hi jiawentao,

    I dont see any other way. If one of the ISR is taking bit longer and since there is no nested interrupt support, then this timer isr, which is few us level interrupt, can get affected.. 

    Regards,

    Brijesh