AM6412: AM64x GPIO interrupt configuration error when A53 and R5 configure GPIO pins in SAME GPIO_BANK

Thomas,

Thanks for your query. today is a holiday in TI-India. please expect a delay of a day in response.

In the meantime there is a FAQ which explains a lot about configuring GPIO's

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1198105/faq-am64x-how-to-run-mcu-sdk-gpio_input_interrupt-example-for-r5fss0-0-with-linux-running-on-a53

I would recommend to go through this.

Regards

Anshu

Hello Thomas,

I understand based on the code you shared that you want to route the MAIN_GPIO0_7 pin interrupt to R5F1_0 and the MAIN_GPIO0_8 pin interrupt to A53.

Please correct me if my understanding is wrong.

I verified on my end and your configurations are correct.

Please see GPIO Interrupt Router register value and it has 0x100BE - > BE value 190 which contains GPIO0 bank interrupt and configured 12th router which routes GPIO interrupts to R5F1_0 as per driver.

I suspect that you are running the example above on R5F0_0 instead of R51_0, and if you do that you may get the error.

If you run your configurations on R5F1_0 you may not get an SCI client error.

I have attached GPIO interrupt example on R51_0.

empty_am64x-evm_r5fss1-0_nortos_ti-arm-clang.zip

Regards,

S.Anil.

Hi Anil,

Attached is the problem I reproduced in CCS, could you pls test this  on your AM64x GP EVM. 

If you run the R5 project first, there will be no SCI client error, and then run the A53 project, and the SCI error will appear. Similarly, if you run the A53 project first and then run the R5 project, the same error will occur. 

Thanks and regards,

Jason

1423.GPIO_interrupt.zip

Hello Jason ,

Sorry for the delayed response. Yesterday I was on leave, and I am working on your thread. You get reply in a one or two days .

Regards,

S.Anil

Hello Jason ,

I am able to reproduce the issue and as of now I understand that driver is not supporting routing same interrupt to different cores . That is why you are getting an SCI client error.

I am checking with system engineers to see if we can route the same GPIO interrupt to R5F and A53.

Please wait for one or two days.

Regards,

S.Anil.

Hello Jason ,

I got a reply from the system engineer about your issue.

Currently, you can't route the same GPIO bank interrupt to both cores. Either way, you can route bank interrupts to R5F or A53.

So, that's why you're getting an SCI client error when you try to configure the GPIO interrupt router for the second time.

My suggestion is that you follow the steps below to meet your requirements.

I understand that you want to route GPIO0_8 pin interrupts to the A53 core and GPIO0_7 pin interrupts to the R5F_0 core.

You can replace your rmIrqReq.src_index value in both R5F and A53 examples  with the below changes, and let me know if you face any issues.

Change 1 in A53:

rmIrqReq.src_index = 8; //configured Pin interrupt instead of Bank interrupt 

Change 1 in R5F:

rmIrqReq.src_index = 7; //configured Pin interrupt instead of Bank interrupt 

Regards,

S.Anil.

Hi Swargam,

Thanks for your reply, But will the same pins of different banks conflict? such as GPIO0_7 and GPIO1_7

Thanks and regards,

Jason

Jason Ding said:

Thanks for your reply, But will the same pins of different banks conflict? such as GPIO0_7 and GPIO1_7

Hello Jason ,

You don't get any issue. It should work. You can route different bank interrupts to different cores.

Are you facing any issue?

Regards,

S.Anil.

Hi Swargam,

Yes,Routing according to the pin will not report an error, but if route different banks to the same pin, for example

rmIrqReq.src_index = 43; //configured GPIO0_43 

rmIrqReq.src_index = 43; //configured GPIO1_43

there is SCI error, and need One of them needs to be routed according to the bank, and the other is routed according to the pin, right?

Thanks and regards,

Jason

Hi Swargam,

there is other configure issues in my code, now, No sci client error occur for routing different banks with the same pin number.

Thanks and regards,

Jason