AM5728: wrong char displayed in UART terminal at over 430kbps

void UARTConfigInit(uint32_t baseAddr, uint32_t baudRate, uint32_t wordLength,
                    uint32_t stopBit, uint32_t parity, uint32_t mode)
{
    uint32_t divisorValue = 0U, fifoConfig = 0U;

    /* Performing a module reset. */
    UARTModuleReset(baseAddr);

    /* Performing FIFO configurations. */
    /*
    ** - Transmit Trigger Level Granularity is 4
    ** - Receiver Trigger Level Granularity is 1
    ** - Transmit FIFO Space Setting is 56. Hence TX Trigger level
    **   is 8 (64 - 56). The TX FIFO size is 64 bytes.
    ** - The Receiver Trigger Level is 1.
    ** - Clear the Transmit FIFO.
    ** - Clear the Receiver FIFO.
    ** - DMA Mode enabling shall happen through SCR register.
    ** - DMA Mode 0 is enabled. DMA Mode 0 corresponds to No
    **   DMA Mode. Effectively DMA Mode is disabled.
    */

    fifoConfig = UART_FIFO_CONFIG(UART_TRIG_LVL_GRANULARITY_1,
                                  UART_TRIG_LVL_GRANULARITY_1,
                                  1,
                                  1,
                                  1,
                                  1,
                                  UART_DMA_EN_PATH_SCR,
                                  UART_DMA_MODE_0_ENABLE);

    /* Configuring the FIFO settings. */
    UARTFIFOConfig(baseAddr, fifoConfig);

    /* Performing Baud Rate settings. */
    /* Computing the Divisor Value. */
    divisorValue = UARTDivisorValCompute(UART_MODULE_INPUT_CLK,
                                         baudRate,
                                         mode,
                                         UART_MIR_OVERSAMPLING_RATE_42);

     UARTOperatingModeSelect(baseAddr, mode);

    /* Programming the Divisor Latches. */
    UARTDivisorLatchWrite(baseAddr, divisorValue);

    /* Switching to Configuration Mode B. */
    UARTRegConfigModeEnable(baseAddr, UART_REG_CONFIG_MODE_B);

    /* Programming the Line Characteristics. */
    UARTLineCharacConfig(baseAddr, (wordLength | stopBit), parity);

    /* Disabling write access to Divisor Latches. */
    UARTDivisorLatchDisable(baseAddr);

    /* Disabling Break Control. */
    UARTBreakCtl(baseAddr, UART_BREAK_COND_DISABLE);

    /* Uart enable */
    UARTOperatingModeSelect(baseAddr, mode);
    UARTIntEnable(baseAddr, 0x01);
}



    /*  call  */
    UARTConfigInit(DaqUartBaseAddr,  BAUD_RATE_460800, UART_WORD_LENGTH_8, UART_STOP_BIT_1,UART_NO_PARITY,UART_13x_MODE);