Hello,
In the PCB layout file, I noticed that there is a copper pour ring around the entire board. It's connected to DGND and has vias along the edges, connecting to similar rings on the other layers.
What is the purpose of these? To protect traces carrying signals?
Below are screenshots of the board:
Close up:
Thank you.
Hi,
What version of the layout are you looking at?
I see a different implementation (screenshot below) in all versions (E3, E4, A, B) of TMDX654IDKEVM from https://www.ti.com/lit/zip/sprcah0
These versions still have GND VIAs all the way around the board. These VIAs act as a Faraday cage (picket fence) to keep radiated emissions from escaping from the PCB layers. this helps to pass FCC testing.
In the picture you attached, I have concerns about having a separate GND ring around the board. Again I couldn't find the layout with this implemented, but my concern is how that GND ring attaches to the GND planes in the center of the board. I've seen 0-ohm shunt resistors that connect a GND ring like this to the rest of the GND plane experience electrical over stress (blow open like a fuse). This can happen if 1) the outer GND ring is grounded to earth GND (through a scope probe for example), 2) the power supply jack makes contact to the positive terminal before contacting the GND terminal of the barrel jack, and 3) the power supply is also connected to the earth ground (with a 3 pin electrical outlet plug). The inrush current to charge caps on the board is huge and can easily overwhelm whatever components are between the outer GND ring and the inner GND plane.
This is one reason why we recommend first plugging the EVM into the barrel jack before plugging the power supply into the wall. DC jacks are not guaranteed to make a GND connection before a +12V or +5V connection.
Anyway, don't do the GND ring pour that is disconnected from the rest of the GND plane. Do go ahead and add GND stitching VIAs around the board to forma Faraday cage for radiated emissions, espicially if you will require FCC certification.
GND stitching VIAs are also important whenever a signal changes layers and becomes referenced to a different GND plane. You must bridge the two GND planes near the signal VIA or else the return current fields will be large and may radiate, detectable through EMI/EMC testing.
Regards,
Mark
Hi Mark,
Thanks for the response. According to the title block in the file, I should have revision B:
I downloaded the PCB file some time ago, so I don't remember which zip I got from the product page. The file name is PROC062B_BRD which seems to be consistent with the rev B file names in SPRCAH0A.ZIP
In any case, I'm not sure why my version appears the way it does, but your reply answered my question so I'm satisfied 
Thank you,
Michael
