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AM62A7 - single or dual MIPI-CSI2 interface(s) ?

Other Parts Discussed in Thread: AM62A7-Q1, AM62A7

Dear TI Processor Community,

The description of AM62A7-Q1 says  "2 TOPS vision SoC with RGB-IR ISP for 1-2 cameras, driver monitoring, front cameras" but from its datasheet, I understand that there's single MIPI-CSI2 interface as well as single Vision Processing Accelerators  (VPAC) with single Image Signal Processor (ISP), i.e. single camera pipeline. Am I correct or did I miss some information? 

If it is correct, would future revision of AM62A support 2 camera pipelines, please ?

Thanks in advance and best regards,

Khang