Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH
Hi
I ran into a problem during debugging, adding a new block of nocache memory (freetech_share_mem), but when updating the memory data on R5F, the data in DDR would not be updated without calling appMemCacheWb (if i call appMemCacheWb,the DDR will be updated).
The following is the mpu configuration (configured as nocache, and the Lauba validation has taken effect).
The code logic is as follows and the verification result(Use Lauterbach to access the ddr directly):
if i call appMemCacheWb,Using Lauterbach to read the ddr directly you can see that the data at this address will be updated，When commented out appMemCacheWb the data will not update
Why do I need to write back to cache when MPUs are configured as nocache?
As you can see from the disassembly code, this part of the code does manipulate the address in the DDR:
