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DRA821U: About VDDSHVx characteristics

Part Number: DRA821U
Other Parts Discussed in Thread: J7200XSOMXEVM, DRA821

Hello,

I have two questions.
TI's evaluation board (J7200XSOMXEVM) uses VDD_MCUIO_3V3 to power the PwrGrp: VDDSHV0_MCU.

1.If 3.3V from another system is used for the GPIO[INPUT] of PwrGrp:VDDSHV0_MCU, is there a possibility that 3.3V from another system will flow into VDDSHV0_MCU (E13/E14/F13/F14)?
"It means to use a separate 3.3V for the signal line like “①” in Fig. 1."

2.Also, is it possible with the DRA821 that the VDDSHV0_MCU voltage is also applied(wrap around) to another power group (eg VDDSHV2_MCU, etc.)?

best regards,

  • Most of the processor IO are NOT fail-safe, meaning voltage cannot be supplied to the IO before power is supplied to the IO's power (VDDSHVx).  If power is supplied to IO before VDDSHVx, yes leakage can occur. 

    Not sure I understand Q2....yes multiple IO banks (VDDSHVx) can be supplied from same power source.   Maybe I'm not understanding question....

  • Dear Robert

    Thank you for answering.
    > If power is supplied to IO before VDDSHVx, yes leakage can occur.
    →Is it possible that IO leaks into VDDSHVx?

    >Not sure I understand Q2....yes multiple IO banks (VDDSHVx) can be supplied from same power source. Maybe I'm not understanding question....
    →Sorry for the bad way of wording the question.
     As an example,if VDDSHV0_MCU (=3.3V) is used and VDDHSV5 is not used, is it possible that the VDDSHV0_MCU voltage (3.3V) is output to VDDSHV5 (3.3V or less than 3.3V)?

    best regards,

  • If voltage is supplied to and IO before power is applied to VDDSHVx, leakage can occur.  Yes it is possible you would see voltage on the VDDSHVx for that IO.  (Yes leakage from IO to VDDSHVx)

    All power rails are required to have proper voltage supplied, even if unused.  If VDDSHV5 IO are not used, VDDSHV5 still requires a valid power source (valid voltage level) connected.  VDDSHVx power rails cannot be left unconnected.