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TDA4VM-Q1: J721e RTOS SDK version 8.05.00 SDL PBIST Example Queries

Part Number: TDA4VM-Q1
Other Parts Discussed in Thread: TDA4VM

Hello,

I installed the RTOS SDK 0805 for function safety development based on SDL(Software Diagnostic Library), which is provided in the SDK0805. And I follow the user guide (4.3. PBIST : Memory Built-In Self-Test — Software Diagnostics Library (SDL) - J721E User Guide) and trying to run the PBIST test example on the TDA4VM MCU R5F, which is runnning Autosar.

1. According to the user guide, 

  • PBIST must be run from a different core than is being tested. This is because the test is destructive in nature. For this reason also, after BIST test it is necessary to reset the module.

if I deploy the SDL PBIST running on MCU R5F referring to the PBIST test example, it can perform the PBIST upon other IP/cores including A72, C6x, C7x, R5F on Main Domain etc. But who is to perform the PBIST instance on MCU R5F itself?  If it is possible to test it, and how?  The test example seems not showing the way to test MCU R5F instance itself.

Or according to the user guide:

  • BIST is executed by hardware for MCU automatically at boot up as part of HW POST.

By PBIST_hwpostTest we can say the MCU R5F PBIST is already done? hence no need to perform PBIST on MCU R5F anymore?

2. By the SDL PBIST example, I can see the PBIST_funcTest() is running the real PBIST for the IP/cores including the failure injection cases(neg tests). Then what is the purpose of PBIST_errTest()?  Is this test function necessary during the every time system boot-up phase? or it is just used for testing the SDL modules during the development phase and can be abandoned later afterwards.

3. In function PBIST_runTest() from the test examples, what is the purposes of compilation condition PBIST_POST_CORE_MAX and POWERUP_CORES_BEFORE_TEST?  Perhaps there are guidance for these but I cannot find out yet.

4. Is it recommended to run PBIST before or after the SBL, or just within the boot manager?

thanks for your patience.

  • Q1: MCU domain R5 and DMSC BIST are executed by hardware automatically at boot up as part of HW POST.

    Q2: It is used internally to validate the PBIST API.

    Q3: PBIST_POST_CORE_MAX is just used for loop purpose in SW. POWERUP_CORES_BEFORE_TEST is option to power up the core if it is not done already. These are used inside the test, not API, so they are not documented. Please refer to the source code for details.

    Q4: Typically PBIST for certain modules, like A72, R5, DSP, MSMC are run as part of SBL before the cores are loaded with application since the cores have to be reset after BIST tests.