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TDA4VL-Q1: Should we set the memory for remote log in vision apps in RTOS SDK to non-cached?

j l
Prodigy 60 points
Part Number: TDA4VL-Q1

Hi there,

When I tried the remote log app in vision apps rtos sdk software-dl.ti.com/.../group_apps_utilities_app_remote_log.html,

I found that the shared memory used for log among all the cpus is not set to non-cached in mcu2_0.

In psdk_rtos/vision_apps/platform/j721s2/rtos/app_mem_map.h, log memory is defined as: #define APP_LOG_MEM_ADDR (0xAA000000u)

But in vision_apps/platform/j721s2/rtos/mcu2_0/j721s2_mpu_cfg.c, no memory region containing APP_LOG_MEM_ADDR is set to non-cached.

This memory should be set to non-cached, right? Is there anyplace else the log memory set to non-cached?

And I can see that the IPC memory is set to non-cached as region 8 in j721s2_mpu_cfg.c. Should it be the same for log mem?

Thanks!

  • 0
    TI__Guru**** 475725 points

    hi,

    This memory is part of the region-8 memory, which is already non-cached.

    {
    /* Region 8 configuration: Log mem + Carveout */
    .regionId = 8U,
    .enable = 1U,
    .baseAddr = APP_LOG_MEM_ADDR,
    .size = CSL_ARM_R5_MPU_REGION_SIZE_64MB,
    .subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
    .exeNeverControl = 1U,
    .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
    .shareable = 0U,
    .cacheable = (uint32_t)FALSE,
    .cachePolicy = CSL_ARM_R5_CACHE_POLICY_NON_CACHEABLE,
    .memAttr = 0U,
    },

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 60 points

    Thanks Brijesh. I found the definition you mentioned in ti-processor-sdk-rtos-j721s2-evm-08_06_00_11/vision_apps/platform/j721e/rtos/mcu2_1/j721e_mpu_cfg.c. However, in ti-processor-sdk-rtos-j721s2-evm-08_06_00_11/vision_apps/platform/j721s2/rtos/mcu2_0/j721s2_mpu_cfg.c, many regions for inter-core communication including the log mem are missed. Is this a mistake? Could you please check the file? Thanks.

  • +1 in reply to j l
    TI__Guru**** 475725 points

    I think they are all included in the 128MB non-cached region.

    /* Region 7 configuration: Ring buffer */
    .regionId = 7U,
    .enable = 1U,
    .baseAddr = IPC_VRING_MEM_ADDR,
    .size = CSL_ARM_R5_MPU_REGION_SIZE_128MB,
    .subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
    .exeNeverControl = 1U,
    .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
    .shareable = 0U,
    .cacheable = (uint32_t)FALSE,
    .cachePolicy = CSL_ARM_R5_CACHE_POLICY_NON_CACHEABLE,
    .memAttr = 0U,
    },

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 60 points

    Oh I see. Thanks!