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DM8148 - DDR3: Differential impedance for CLK and DQS?

AnBer
Mastermind 30110 points

Team,

It seems that the SERDES_CLKN/P Routing Specifications are missing from the DM8148 datasheet -SPRS647. Specifically interested in the Differential impedance.

This information is in the DM8168 datasheet (at page 144 table Table 7-9 of SPRS614) but not yet in the DM8148 datasheet. Could you please provide it?

Thanks and best regards,

Anthony

  • 0
    TI__Expert 5475 points

    Hi,

    From our perspective, the clock signal is an input and so long as the clock is within spec when it gets to us, we are good.

    That said, you need to consult the requirement of the manufacturer to the clock source you are using. Typically it is around 100ohms.

    Best regards, Zegeye

  • 0 in reply to Zegeye Alemu
    TI__Mastermind 30110 points

    Thanks Zegeye,

    - Generally speaking are there plan to have a an equivalent table (as for DM8168 - SPRS647 tab 7-9 page 144) in the DM8148 datasheet?
    - Is table 7-9 close enough for both DM8168 and DM8148 so that the same can be used as well for DM8148?

    The goal being to be able to make a working PCB design somehow some guideline to route CLKN/P are needed. Table 7-9 does provide some of this for DM8168.

    Thanks and best regards,

    Anthony

  • 0 in reply to AnBer
    TI__Expert 5475 points

    Hi Anthony,

    I saw the table you referred after I replied. I agree with your comment that the table has good information that would assist the user in terms of routine guideline and it is good to have the same info in this device datasheet on the next update. This table should be used in conjunction with the clock source datasheet.

    Thanks again and best regards,

    Zegeye