PROCESSOR-SDK-J721E: How to detect good TLP arriving at PCIe.

Simon Gibbs

Looking at the TRM, I cannot see an interrupt that indicates that data has been written to a memory mapped area, or an indication that a completion TLP has been received.

Please could you indicate the method that good incoming data can be detected by a PCIe driver.

over 2 years ago

0 B.C. over 2 years ago

TI__Genius 16906 points

The Mailbox module in J721E can be used to trigger interrupts via memory mapped writes over PCIe.

0 Simon Gibbs over 2 years ago in reply to B.C.

Prodigy 80 points

I have found a description of the Mailbox module in the TRM. Section 7.1.3 Mailbox Functional Description describes mailbox users. I believe that the users are software entities. However I am trying to understand how a mailbox message could be triggered by the PCIe automatically without software having to for example poll the memory allocated to the device. Sorry if I am not understanding the description.

0 B.C. over 2 years ago in reply to Simon Gibbs

TI__Genius 16906 points

The PCIe link partner can write a message to the selected Mailbox which will trigger and interrupt for the CPU to take action.

0 Simon Gibbs over 2 years ago in reply to B.C.

Prodigy 80 points

Thanks B.C. What do you mean the PCIe link partner? Do you mean the driver?

0 B.C. over 2 years ago in reply to Simon Gibbs

TI__Genius 16906 points

The link partner is the PCIe device that is connected the the J721E SoC.

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PROCESSOR-SDK-J721E: How to detect good TLP arriving at PCIe.