Part Number: TMS320C6748
Platform: TMS320C6748
LCD interface:RGB565
Active Screen Size:480*360
Issue description:
At different CPU frequencies, the same picture is displayed and the data is periodically refreshed once per second.
When the CPU frequency is set to 100MHz, the picture is displayed normally. When the frequency is increased to 200MHz or 300MHz, the display will be mislocated when the data is refreshed.
Normal picture and sequence diagram:

(Figure 1).Normal display
As shown in Figure 1, this is the normal display.
The CPU frequency is 100MHz, the LCD_PCLK frequency is 10MHz, and the screen refresh rate is about 51Hz.
The signal captured by the logic analyzer is shown in Figure 2(the red box is 1 frame range) :

(Figure 2).Sequence diagram corresponding to Figure 1
channel 0:PCLK (10MHz)、
channel 1:VS(51.6Hz)、
channel 2:HS(19.8kHz)、
channel 3:DE、
channel 4:DATA0.
Abnormal picture and sequence diagram:


(Figure 3).Abnormal display A (Figure 4).Abnormal display B
As shown in Figure 3, Figure 4, this is the Abnormal display.
The CPU frequency is 300MHz, the LCD_PCLK frequency is 10MHz, and the screen refresh rate is about 51Hz.
The signal captured by the logic analyzer is shown in Figure 5(the red box is 1 frame range):

(Figure 5).Sequence diagram corresponding to Figure 3
Comparative analysis of normal and abnormal sequences:
Since (Figure 1) and (Figure 3) show basically the same content, you can determine by comparison that the content shown in the red box below in Figure 5 is just a frame of data. But the data in Figure 5 is not synchronized with frame signals such as VS and DE.


(Figure 6).DATA0 data waveform comparison
It can be seen that the dislocation of the picture display is caused by the synchronization of DATA and VS frame signals.
Question:
- Is the display dislocation described above related to CPU frequency?
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The Raster LCD controller sends the image data to the LCD display through DMA. If the CPU writes the image data to the display buffer at this time, will there be a conflict? If there is a conflict, how to resolve it?
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Raster LCD controller sends image data to LCD display through DMA. If the CPU also uses DMA for data transmission, will there be a conflict? If there is a conflict, how to resolve it?