• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 97 subscribers
  • Views 477 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Question on connecting LCD with VPBE in YCC16 mode

Anonymous
Anonymous

Hi,

 

I would like to ask a question on VPBE’s interfacing to LCD.

 

 

The above is the signal and pin description of an LCD screen I am considering. Since it has 16 data pins, it seems to me that it should be interfaced with DM6437’s VPBE in YCC16 mode.

 

However, on page 30 of spru952a, TMS320DM643x DMP Video Processing Back End (VPBE) User's Guide, there is HSYNC and VSYNC signals, whereas there are no corresponding pins on the screen.

Additionally, how should WR# and RD# pins of the LCD be connected? LCD is only a display device, so why there are write and read operations here?

 

 

 

Zheng

  • Anonymous
    0 Anonymous

    Another question is that why HSYNC and VSYNC signal are needed in YCC16 interface? According to ITU BT.656 standard, all sync signals are in fact embedded in the YUV signal and there is no need for dedicated pins for vertical and horizontal synchronization purposes. So why are VSYNC and HSYNC still appear on table here?

     

      re?

     

        

     

    Zheng

  • 0 in reply to Anonymous
    TI__Expert 4685 points

    Suppose you want to interface LCD which supports custom resolution. In that case, you need to program Hsync and Vsync seperately.

  • Anonymous
    0 Anonymous in reply to Nagabhushana

    Nagabhushana,

     

    According to your knowledge, which among VPBE's three digital display interfaces:

    1. YCC16
    2. YCC8
    3. Parallel RGB

    should I use when interfacing with a small TFT-LCD?

    How many different resolutions does VPBE support? Is it fixed? If not fixed, do I have to program HSYNC and VSYNC? Via VPBE registers?

     

     

    Zheng

     

     

  • 0 in reply to Anonymous
    TI__Expert 4685 points

    Please refer to section 1.2.2 of VPBE user guide for standards supported by VPBE. Check section 3.1.13 about frequency range which should help in understanding LCD resolution restriction. Also section 4.4.4 should help.

  • Anonymous
    0 Anonymous in reply to Nagabhushana

    Nagabhushana,

    I am going experiment on a LCD screen and return to this thread later.

     

    Zheng