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Bootloader document

Need to clarify something in the bootloader document

1. The bootloader is DSP code (stored inside internal L3 ROM 128 KB that starts at 0x20B00000?) that transfer application code (instruction code and not data?) from slow non-volatile external memory (external ROM?? in the case of EMIF boot option) into high-speed internal memory (DDR3 SDRAM??)

2. What do you mean by "Boot is driven on a device reset by CorePac0" on pg 2-2.

3. What is PORz pin (or RESETFULLz)? Isn't it just POR pin on the C66 chip? Or is it every DSP core has its own POR pin? 

  • Wenjun Huang,

    Wenjun Huang said:
    1. The bootloader is DSP code (stored inside internal L3 ROM 128 KB that starts at 0x20B00000?) that transfer application code (instruction code and not data?) from slow non-volatile external memory (external ROM?? in the case of EMIF boot option) into high-speed internal memory (DDR3 SDRAM??)

    For specifics on addresses and available boot modes, we will need to know which C66xx device you are asking about.

    Wenjun Huang said:
    2. What do you mean by "Boot is driven on a device reset by CorePac0" on pg 2-2.

    After a device reset has been initiated (a reset pin asserted and then de-asserted), CorePac0 will being executing the Bootloader code in the on-chip ROM.

    Wenjun Huang said:
    3. What is PORz pin (or RESETFULLz)? Isn't it just POR pin on the C66 chip? Or is it every DSP core has its own POR pin?

    The correct signal names use an "over bar", a line drawn over the signal name to indicate it is an active-low signal. In text, it is common to use a suffix (or rarely a prefix) such as the letter z or n or the slash symbol / to indicate the active-low signal. You will find this syntax to be used throughout the engineering literature.

    Regards,
    RandyP

  • Oh, the device that I am looking at is C6672.

     

    Thanks for the clarification.