AM625: Boot time between A53 SPL and A53 U-Boot

JaeWook Kim

Intellectual 370 points

Part Number: AM625

Dear TI Expert,

SW : Processor SDK 8.5

HW : AM62-SKEVM rev E3

Boot mode : eMMC

I'm checking the booting time on EVM and using eMMC for boot.

However, it takes a lot of time(1.3sec) between A53 SPL and A53 U-Boot as shown in the log below.()

[0.863986 0.000098] U-Boot SPL 2021.01-00001-g3e29ce144c (Feb 16 2023 - 15:35:12 +0900)
[0.866361 0.002375] SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.3--v08.05.03 (Chill Capybar')
[0.927521 0.061160] Trying to boot from MMC1
[2.207378 1.279857]
[2.207499 0.000121]
[2.207553 0.000054] U-Boot 2021.01-00001-g3e29ce144c (Feb 16 2023 - 15:35:12 +0900)

jwook@jwook-Desktop:~$ grabserial -d /dev/ttyUSB0 -t
[0.000001 0.000001] 
[0.159659 0.159658] U-Boot SPL 2021.01-00001-g3e29ce144c (Feb 16 2023 - 16:45:02 +0900)
[0.174948 0.015289] SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.3--v08.05.03 (Chill Capybar')
[0.222873 0.047926] SPL initial stack usage: 13424 bytes
[0.238958 0.016085] Trying to boot from MMC1
[0.367542 0.128584] Loading Environment from MMC... OK
[0.479892 0.112349] init_env from device 9 not supported!
[0.495928 0.016037] Starting ATF on ARM64 core...
[0.497019 0.001091] 
[0.497065 0.000046] NOTICE:  BL31: v2.7(release):v2.7.0-359-g1309c6c805-dirty
[0.511551 0.014486] NOTICE:  BL31: Built : 11:48:12, Dec 14 2022
[0.526910 0.015359] I/TC: 
[0.527226 0.000316] I/TC: OP-TEE version: 3.19.0-15-gd6c5d0037 (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 Wed Dec 14 11:52:03 UTC 2022 aarch64
[0.547191 0.019965] I/TC: WARNING: This OP-TEE configuration might be insecure!
[0.559039 0.011848] I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
[0.559802 0.000763] I/TC: Primary CPU initializing
[0.560003 0.000201] I/TC: SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.3--v08.05.03 (Chill Capybar')
[0.575335 0.015332] I/TC: HUK Initialized
[0.575485 0.000150] I/TC: Activated SA2UL device
[0.575672 0.000186] I/TC: Fixing SA2UL firewall owner for GP device
[0.575978 0.000306] I/TC: Enabled firewalls for SA2UL TRNG device
[0.591151 0.015174] I/TC: SA2UL TRNG initialized
[0.591386 0.000235] I/TC: SA2UL Drivers initialized
[0.591688 0.000303] I/TC: Primary CPU switching to normal world boot
[0.863888 0.272199] 
[0.863986 0.000098] U-Boot SPL 2021.01-00001-g3e29ce144c (Feb 16 2023 - 15:35:12 +0900)
[0.866361 0.002375] SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.3--v08.05.03 (Chill Capybar')
[0.927521 0.061160] Trying to boot from MMC1
[2.207378 1.279857] 
[2.207499 0.000121] 
[2.207553 0.000054] U-Boot 2021.01-00001-g3e29ce144c (Feb 16 2023 - 15:35:12 +0900)
[2.224181 0.016628] 
[2.224194 0.000013] SoC:   AM62X SR1.0 GP
[2.224350 0.000156] Model: Texas Instruments AM625 SK
[2.271379 0.047028] EEPROM not available at 0x50, trying to read at 0x51
[2.302705 0.031327] Board: AM62-SKEVM rev E3
[2.303161 0.000456] DRAM:  2 GiB
[2.510875 0.207714] MMC:   mmc@fa10000: 0, mmc@fa00000: 1, mmc@fa20000: 2
[2.512778 0.001902] Loading Environment from MMC... OK
[2.607454 0.094676] In:    serial@2800000
[2.608266 0.000812] Out:   serial@2800000
[2.609070 0.000804] Err:   serial@2800000
[2.622718 0.013647] Net:   eth0: ethernet@8000000port@1
[2.624182 0.001465] Hit any key to stop autoboot:  0

Is this expected result?

Please let me know how to reduce the boot time between them if you have.

Thanks&Regards,

Jaewook

over 1 year ago

0 Bin Liu over 1 year ago

TI__Guru*** 147816 points

Hi Jaewook,

I think this 1.0+ sec number seems to be right in the SDK default U-Boot, which is not optimized for boot time.

If you want to speed up the boot time, you might want to reduce the U-Boot binary size to make the binary load faster, by disabling some unused U-Boot modules, and/or unused dtb nodes...

Can you please apply the following U-Boot patch to see if it improves boot time from eMMC boot?

diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
index 4d31dba4b2e5..82dc83d2c7a3 100644
--- a/arch/arm/dts/k3-am62-main.dtsi
+++ b/arch/arm/dts/k3-am62-main.dtsi
@@ -338,10 +338,8 @@
                reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>;
                interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
+               clocks = <&k3_clks 57 5>, <&k3_clks 57 7>;
                clock-names = "clk_ahb", "clk_xin";
-               assigned-clocks = <&k3_clks 57 6>;
-               assigned-clock-parents = <&k3_clks 57 8>;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
                ti,trm-icp = <0x2>;

0 JaeWook Kim over 1 year ago in reply to Bin Liu

Intellectual 370 points

Hello Bin Liu,

Thanks for feedback.

Unfortunately there was no valuable improvement after apply patch you suggested.

Do you have additional idea for this?

Thanks,

Jaewook

0 Bin Liu over 1 year ago in reply to JaeWook Kim

TI__Guru*** 147816 points

Hi Jaewook,

What is the boot time requirement in your project?

0 Ronald Wahl over 1 year ago in reply to JaeWook Kim

Prodigy 130 points

TI did not enable the cache for AM62. Try this:

diff --git a/u-boot/arch/arm/mach-k3/am625_init.c b/u-boot/arch/arm/mach-k3/am625_init.c
index 90d2cf284001..1c3aa29fd3b0 100644
--- a/u-boot/arch/arm/mach-k3/am625_init.c
+++ b/u-boot/arch/arm/mach-k3/am625_init.c
@@ -14,6 +14,7 @@
 #include <dm.h>
 #include <dm/uclass-internal.h>
 #include <dm/pinctrl.h>
+#include <cpu_func.h>
 
 #define RTC_BASE_ADDRESS               0x2b1f0000
 #define REG_K3RTC_S_CNT_LSW            (RTC_BASE_ADDRESS + 0x18)
@@ -122,6 +123,7 @@ void board_init_f(ulong dummy)
        int ret;
 
 #if defined(CONFIG_CPU_V7R)
+       disable_linefill_optimization();
        setup_k3_mpu_regions();
        rtc_erratumi2327_init();
 #endif
@@ -221,6 +223,8 @@ void board_init_f(ulong dummy)
        if (ret)
                panic("DRAM init failed: %d\n", ret);
 #endif
+       spl_enable_dcache();
+       icache_enable();
 }
 
 u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)

0 JaeWook Kim over 1 year ago in reply to Bin Liu

Intellectual 370 points

Hello Bin Liu,

This is a requirement of my project.

"Linux shall start in 2sec"

Thanks,

Jaewook

+1 Bin Liu over 1 year ago in reply to JaeWook Kim

TI__Guru*** 147816 points

Hi JaeWook,

I don't think you can boot to Linux shell within 2sec by just optimizing U-Boot, but you might consider to use R5 SPL directly boot kernel, skip A53 uboot, then 2sec to Linux shell is possible. Please check the following instructions on how to use R5 SPL boot kernel.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1205638/faq-am625-how-to-boot-from-r5-u-boot-spl-directly-into-the-linux-kernel-skipping-a53-spl-and-a53-u-boot-falcon-mode

0 JaeWook Kim over 1 year ago in reply to Ronald Wahl

Intellectual 370 points

Hello Ronald,

It was improved after apply patch you suggested.

Thanks for sharing good information.

Best Regards,

Jaewook

Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

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AM625: Boot time between A53 SPL and A53 U-Boot