C6727 dMAX for SPI transfer

Balachandra,

 

The SPI transfer supported by dMAX can be used for both slave and master transfers. For the case of master, the CPU needs to kick start the transfer by writing to the SPIDAT register using CPU. After the word written by CPU is transmitted, the SPI will generate event for dMAX to transfer the next element.

See below:

/*

     Generate the event to start the transfer by writing to the SPIDAT1 register

*/

pInst->hSpi->regs->SPIDAT1 = (pInst->hSpi->regs->SPIDAT1 & 0xFFFF0000) | 0xFFFF;

 

Regards,

Gagan

 

 

 

Hi Gagan,

I am trying to configure dMAX in Spi slave transfer mode.

For test purpose SPI is configured as Master and loopback is enabled for SPI. After enabling the SPI DMA request, I am writing to SPIDAT1 register. The dMAX transfer is not getting triggered, eventhough the SPI receive event is generated properly, after writing to the SPIDAT1 register.

Following are the discrepancies observed while debugging the code:

1. DELPR bit is not getting set when I enable low priority event.

2. When I set the DEHPR bit, corresponding bit in both DEHPR and DELPR are getting set.

3. The CSL_dmaxHwSetup API is not setting the ESIZE field for both 16-bit and 32-bit modes, the value taken is '01' for all modes.

So, I am writing explicitely to that memory location using dMAX handle.

4. Required system patch Version 2_00_00 is being used.

 

Please let me know if you would have faced similar problems in SPI-dMAX.

Thanks in advance,

Balachandra

See below some code snippets that may help debug the issue:

 

Step 1: Init

    /* Call the CSL Init functions */

    CSL_chipInit(NULL);

    CSL_dmaxInit(NULL);

 

 

Step 2: dMAX Object create

    /*********************************************************/

    /* Allocate the dMAX object for the SPI transfer */

    /*********************************************************/

    pDmaxObj = (Void *)malloc ((sizeof(CSL_DmaxObj)+3)/4*4);

    if (!pDmaxObj)

        return (SWU_ERR_DMAOPEN);

 

    /*

        Update the event and param information based on the

        priority of dMAX that is requested

    */

    if (pInst->priority == CSL_DMAX_HI_PRIORITY) {

        /* Associate with the appropriate SPI event */

        if (pInst->SPIModule == CSL_SPI_0)

            pDmaxObj->eventUid = CSL_DMAX_HIPRIORITY_SPI0RX_UID;

        else

            pDmaxObj->eventUid = CSL_DMAX_HIPRIORITY_SPI1RX_UID;

 

        pDmaxObj->paramUid = CSL_DMAX_HIPRIORITY_PARAMETERENTRY_ANY;   

    }

    else {

        /* Associate with the appropriate SPI event */

        if (pInst->SPIModule == CSL_SPI_0)

            pDmaxObj->eventUid = CSL_DMAX_LOPRIORITY_SPI0RX_UID;

        else

            pDmaxObj->eventUid = CSL_DMAX_LOPRIORITY_SPI1RX_UID;

 

        pDmaxObj->paramUid = CSL_DMAX_LOPRIORITY_PARAMETERENTRY_ANY;   

    }

   

    /* Create the instance of dMAX */

    hDmax = CSL_dmaxOpen(pDmaxObj, CSL_DMAX, NULL, &status);                      

    if (status != CSL_SOK) {

        return (SWU_ERR_DMAOPEN);

    }

   

    /* Update the obtained handle in the instance structure */

    pInst->hDmax = hDmax;

    /* Disable the dMAX event for now */

    CSL_dmaxHwControl(hDmax, CSL_DMAX_CMD_EVENTDISABLE, NULL);

 

 

 

Step 3: dMAX Setup

    /*********************************************************/   

    /* Setup up SPI dMAX transfer */

    /*********************************************************/

 

    if (pInst->priority == CSL_DMAX_HI_PRIORITY) {

        /* Get the pointer to event entry and Params */

        eventEntryPtr = hDmax->hiTableEventEntryPtr;

        pDmaxParam = (CSL_DmaxParameterEntry*)(&(hDmax->regs->HiMaxParam));

    }

    else {

        /* Get the pointer to event entry and Params */

        eventEntryPtr = hDmax->loTableEventEntryPtr;

        pDmaxParam = (CSL_DmaxParameterEntry*)(&(hDmax->regs->LoMaxParam));

    }

 

    /* Calculate the pointer to the Params used by this dMAX instance */

    pDmaxParam = (CSL_DmaxParameterEntry *)((int ) pDmaxParam + hDmax->paramPtr*4);

 

    /* Update the event entry for the dMAX transfer */

    *eventEntryPtr =   

    ((pInst->SPIModule & 0x1)          << 29)|     /* SPI */

    ((0x1 & 0x1)                       << 28)|     /* TCINT */

    ((pInst->tccDMAX & 0xF)            << 24)|     /* TCC */

    (0xA0+(hDmax->paramPtr*4 & 0xFFFF) << 8) |     /* PTE */

    ((0x2 & 0x3)                       << 6) |     /* ESIZE */

    ((0x1 & 0x1)                       << 5) |     /* RLOAD */

    ((0x2 & 0x1F)                      << 0);      /* ETYPE */

 

    /*

        Update the Params for the dMAX transfer.

    */

    {

        pDmaxParam->word0 = (Uint32)txBuff0;

        pDmaxParam->word1 = (Uint32)rxBuff0;

        pDmaxParam->word2 = buffSize;

        pDmaxParam->word3 = buffSize;

        pDmaxParam->word4 = (Uint32)txBuff0;

        pDmaxParam->word5 = (Uint32)rxBuff0;

        pDmaxParam->word6 = (Uint32)txBuff1;

        pDmaxParam->word7 = (Uint32)rxBuff1;

    }

 

    /* Set the dMAX transfer priority */

    CSL_dmaxHwControl(hDmax, CSL_DMAX_CMD_SETPRIORITY, &pInst->priority);

    /* Set the ploarity as rising edge */

    polarity = CSL_DMAX_POLARITY_RISING_EDGE;

    CSL_dmaxHwControl(hDmax, CSL_DMAX_CMD_SETPOLARITY, &polarity);

 

 

Step 4: Start the processing

        /*

            Generate the event to start the transfer by writing to

            the SPIDAT1 register

        */

        pInst->hSpi->regs->SPIDAT1 = (pInst->hSpi->regs->SPIDAT1 & 0xFFFF0000) |

                                     0xFFFF;

        /* If data needs to be only TX, enable SPI event dMAX transfer */

        CSL_dmaxHwControl(hDmax, CSL_DMAX_CMD_EVENTENABLE, NULL);     

 

Gagan,

Please let me know where can I find the "pInst" structure declaration. I am not sure whether it is user defined or standard structure.

For the "c672xSystemPatchV2_00_00.lib"  system patch, any API call is required in the code or only including the library in the project is sufficient.

 

Thanks,

Balachandra

 

It is a userdefined structure.

> For the "c672xSystemPatchV2_00_00.lib"  system patch, any API call is required in the code or only including the library in the project is sufficient

No user API call is required. The patch is automatically applied as part of the c_init processing. That is as part of regular C initializaition that happens before the application main is called.

 

Balachandra said:

Please let me know where can I find the "pInst" structure declaration. I am not sure whether it is user defined or standard structure.

It seems to me that pInst is a user defined structure as I don't see it referenced in the CSL code.

Balachandra said:

For the "c672xSystemPatchV2_00_00.lib"  system patch, any API call is required in the code or only including the library in the project is sufficient.

There is a readme.txt file in the System Patch which indicates how to include the library.
Applying TMS320C672x System Patch when using CCS

1. Open your CCS project.
2. Add the object file ,applySystemPatch.obj, to your CCS project.
3. Edit your project build options on the linker options tab to
   add the include library c67xSystemPatchV2_00_00.lib or simply
   add the library file to your CCS project.
4. If the application is written all or partially in 'C'/'C++'
   no further action is required.


Applying TMS320C672x System Patch when using Linker Command 'patch.cmd'

1. Open attached linker command file 'patch.cmd'
2. Edit lines containing
    
     applySystemPatch.obj
     -l c672xSystemPatchV2_00_00.lib

   To reflect absolute path to the directory where these files
   were installed.

   i.e.
    c:/myInstallPath/applySystemPatch.obj
    -l c:/myInstallPath/c672xSystemPatchV2_00_00.lib

As I got a question from a customer about item 2 listed in the previous post (2.When I set the DEHPR bit, corresponding bit in both DEHPR and DELPR are getting set.), I thought it was a good idea to make a comment:

DEHPR and DELPR will always have the same value. These register pairs allow you to clear or set bits without having to use a mask making updating them simpler. Writing a 0 to either register will never have an effect. Writing a 1 to the lower register (DELPR) will clear the bit and make the corresponding event low-priority. Writing a 1 to the upper register (DEHPR) will set the bit and make the corresponding event high-priority.

 

Hi Balachandra,

                 I got similar problem when i configure SPI slave mode with DMAX.I connected SPI0 with SPI1.SPI1 configured as master and SPI0 configured as slave.For SPI0 data tranfers DMAX is using.

When i write data in SPIDAT1 register contents are reaching SPIBUF register and event-13(spi slave transfer) is generated for DMAX .I observed this by checking the contents of DEFR register.

DEFR register contents changing to 0x2000 again to 0x0000.But contents from SPIBUF register is not moved to destination register(which is programed in transfer entry table).

 

Please help me if you have any useful information

Thanks & Regards,

Ajay Reddy.

Ajay,

While configuring SPI-dMAX, I had observed a strange problem inherent in CSL API used. In fact, after configuring  dMAX for SPI-slave transfer, the tranfer entry pointer will be pointing to GP transfer entry address, hence SPI-dMAX will never trigger eventhough everything seems fine. To resolve this issue you need to explicitely write to event entry pointer register after dMaxHwSetup call. Please find the code snippet below which will definitely help you in this regard.

/* dMAX configuration code */

....Initialize CSL structures....

....

/* Setup the DMAX hardware registers */
    status = CSL_dmaxHwSetup(hDmax, &DmaxhwSetup);

 /* Set Element size explicitely */
    *(hDmax->hiTableEventEntryPtr) |=    ELEMENTSIZE16;  //ELEMENTSIZE16=0x00000080
    
 /* Set event entry pointer explicitely */
   *(hDmax->hiTableEventEntryPtr) &=    PARAMTERENTRYMASK;   //PARAMTERENTRYMASK = 0xFFFF00FF
   *(hDmax->hiTableEventEntryPtr) |=    PARAMETERENTRYSPI;      //PARAMETERENTRYSPI  = 0x0000A000<- I had found this will have GP transfer entry address(0x28 instead of 0xA0), check in watch window....

 /* Dmax Event Enable */
    CSL_dmaxHwControl( hDmax, CSL_DMAX_CMD_EVENTENABLE, NULL ); 

Please let me know if you still face the problem.

Thanks,

Balachandra

thank you Balachandra,

          I added the code what ever you sent i am able to see the contents are coming to destination buffer from SPIBUF register.

Thank you very much ,I strugled almost one week to achive this.Finally it is happend with your help.

Thanks again,

Ajay Reddy.

Ajay,

The outcome I got was due to huge effort of around 1month. Anyways, I am delighted to hear that your problem got resolved within short time.

Please let me know if you face any issue related to DMAX and SPI engine of C6727.

Thanks,

Balachandra

 

Hi Balachandra,

     I am using Tms320c6727 processor .To burn source code into flash i am using a simple application which will run from IDE(VC 3.3).Is there any way to burn

source code into flash without using emulator and IDE.Please share any information you have useful.

 

Thanks & Regards,

Ajay Reddy.

 

Ajay,

Are you using PADK? If you are using external flash on customized board, you can make use of DD utility(Direct Dump) available in Linux.

Thanks,

Balachandra