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DM355-SDHC memory card write performance

SAKHO
Intellectual 390 points

Hello,

We are using a dm355 evm board and we want to write large files to a SDHC memory card.  The demo board running Linux 2.6.32-rc2-davinci (argo-project) and the SD card is used as a block device (/dev/mmcblk0p1) and the host controller use DMA and 4bit mode ( davinci_mmc davinci_mmc.0: Using DMA, 4-bit mode).

The mount command that we used:  $ mount -t vfat /dev/mmcblk0p1  /media/mmcblk0p1 -o async

examine these write performances:

Kingston 2GB ----------------------------------> 2.5 MBytes/s

SanDisk 2GB ----------------------------------> 4.1 MBytes/s

SandDisk (SDHC class 6) 4GB -----------> 4.7 MBytes/s

Transcend (SDHC class 10) 8GB --------> 4.5 MBytes/s

EMTEC (SDHC class 4) 4GB --------------> 3 MBytes/s

EMTEC (SDHC class 6) 16GB ------------> 5 MBytes/s

 

All these write performances was obtained using the dd command (time dd if=/dev/zero of=/media/mmcblk0p1/test_write bs=1M count=100).

Thus, we are well below the theoretical write speed of each SD card. What could explain this??

A standard SD card (SanDisk 2GB) faster than a SDHC Card Class 4 (EMTEC 4GB), or SDHC class 6 faster than SDHC class 10 ??? we do not understand this....

On the datasheet (spruee2c.pdf, page 11), the MMC/SD card controller will support the SD Physical Layer Specification V1.1, while most of the SD card that we use are the Specification V2.0 . Is there compatibility issue ??

Yet, the driver high-speed mode function (mmc_switch_hs) is called for switch the compatible SD card on this mode, but without results. 

We want to have write speeds higher. Someone has an idea??

Thank you in advance.

Sakho


  • 0
    Intellectual 390 points

    Hello,

    It's still other elements for the continuation of the previous post..

    Indeed, in the datasheet (spruee2c.pdf, page 13), it is mentioned that the MMC/SD controller is capable of operating with a function clock up to 100 MHz. Whereas for us,  this clock is 108 MHz (DM355 with 216 MHz for ARM clock).  is this a problem?

    In case we need to reduce the frequency of this clock, we shall have to act on the PLL modules. The question is how we can change the peripherals clock frequency without changing the ARM Subsystem clock frequency ??

    We need help...

    Thanks and Kind regards

    Sakho