programming the PLL using DSP/BIOS

E2E_display_name_Mike

I have been using a OMAP L-137EVM. The ref osc is 24 MHz. DSP/BIOS programs the PLL settings to get SYSCLOCK1 to 300 MHz. I examined the registers and it does this by setting the mult to 25 and the post_divide to 2. e.g. 24 x 25 / 2 = 300.

We now have real prototype boards and the ref osc is 19.2 MHz. So I need to change the PLL mult value to 31. Can this be configured with BIOS - in the tconf file? Or do I manually have to reconfigure the PLL registers?

thanks,

Mike

over 16 years ago

0 TimHarron over 16 years ago

TI__Mastermind 18130 points

BIOS doesn't actually program the PLL registers. These values are used to determine how to program the timer used to drive the scheduler. You will need to modify the PLL values yourself to work with the different input clock.

0 E2E_display_name_Mike over 16 years ago in reply to TimHarron

Expert 1700 points

Thanks Tim. Just a note to others who read this thread, the start-up GEL file on the OMAP L-137 configures the PLL (as well as other registers). Whenever you reset the DSP, the GEL file will (re)program these registers. This was part of my confusion. I thought start-up code was changing the PLL defaults to a predetermined value, but it was the GEL file doing this before the code even executed.

Mike

0 TimHarron over 16 years ago in reply to E2E_display_name_Mike

TI__Mastermind 18130 points

Good point Mike,

I should have added that to my post. The GEL file is there to take care of these things for you, but unless you are thinking about that it also causes plenty of confusion as well. Thanks for pointing this out.

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programming the PLL using DSP/BIOS