I am using the DA830 EVM with the TI SDK 03.20.00.14 kernel on the arm side and BIOS 5.33.05 on the DSP side in conjunction with DSPLink 1.65.00.03. I have tried running a modified version of the Message sample as well as the unmodified original version of the sample. In either case, the kernel seems to halt after PROC_start attempts to start the DSP. I do not know if the DSP is running or not.
...
Leaving PROC_load () status [0x8000]
Entered PROC_start ()
procId [0x0]
Entered _SYNC_USR_enterCS ()
csObj [0x29168]
Leaving _SYNC_USR_enterCS () status [0x8000]
Entered DRV_Invoke ()
drvObj [0x29150]
cmdId [0xc018e013]
arg1 [0xbea86c9c]
arg2 [0x0]
**** sample stops outputting here ****
Based on what I've read searching on these forums as well as the wiki, my assumption was that there was a timer conflict between the DSP and the ARM.
"Possible cause: There is an overlap in the configuration of timers on Linux and DSP/BIOS. This problem has commonly been seen on OMAPL137 and DA830 where the timer 0 is used by DSP/BIOS and Linux. In that case: Update the sample to change the BIOS timer to use a different timer. See a sample configuration to change to timer 1."
The example that followed appears to be SYSBIOS 6 specific. I believe DSPBIOS 5 must have its system clock configured differently.
Another assumption I'm making is that DSPBIOS is already using Timer1 which I originally thought was conflicting with the Watchdog used in Linux. This is based on the following lines in my bios_6747.tci file.
prog.module("ISRC").instance("Timer_0").iIntrSelectNum = 4;
prog.module("ISRC").instance("Timer_1").iIntrSelectNum = 40;
prog.module("HWI").instance("HWI_INT14").interruptSelectNumber = 4;
prog.module("CLK").TIMER0BASE = 0x01c20000;
prog.module("CLK").TIMER1BASE = 0x01c21000;
prog.module("CLK").TIMERSELECT = "Timer 1";
I also believe that Linux is using the lower half of Timer0 as its system clock based on the code in arch/arm/mach-davinci/da830.c:
static struct davinci_timer_instance da830_timer_instance[2] = {
{
.base = IO_ADDRESS(DA8XX_TIMER64P0_BASE),
.bottom_irq = IRQ_DA8XX_TINT12_0,
.top_irq = IRQ_DA8XX_TINT34_0,
.cmp_off = DA830_CMP12_0,
.cmp_irq = IRQ_DA830_T12CMPINT0_0,
},
{
.base = IO_ADDRESS(DA8XX_TIMER64P1_BASE),
.bottom_irq = IRQ_DA8XX_TINT12_1,
.top_irq = IRQ_DA8XX_TINT34_1,
.cmp_off = DA830_CMP12_0,
.cmp_irq = IRQ_DA830_T12CMPINT0_1,
},
};
/*
* T0_BOT: Timer 0, bottom : Used for clock_event & clocksource
* T0_TOP: Timer 0, top : Used by DSP
* T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
*/
static struct davinci_timer_info da830_timer_info = {
.timers = da830_timer_instance,
.clockevent_id = T0_BOT,
.clocksource_id = T0_BOT,
};
So, I disabled the watchdog timer in my kernel configuration, which resulted in the same halting output. I've read this page in the wiki on disabling the watchdog timer in the kernel to prevent timer conflicts with the DSP, but it appears to be based on the MontaVista kernel only.
http://processors.wiki.ti.com/index.php/OMAP-L137_Audio_Drivers_in_the_DSP_%2B_Linux#Disabling_Timer1
So I'm not entirely sure that this is a timer conflict. If it is, I'm not particularly happy about not being able to use the watchdog. Ideally, I'd like to be able to use the lower half of T0 for Linux, the upper half of T0 for BIOS and T1 for the watchdog. However, I am relatively clueless as to how I would go about accomplishing this. Most important on my list at the moment though is just to get the examples to run.
