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LINUXSDK-OMAPL138: DDR2-RAM Controller maximum operating frequency

VEERAPPAN P
Intellectual 420 points
Part Number: LINUXSDK-OMAPL138
Other Parts Discussed in Thread: TMS320C6748

Hi, 

  I am using TMS320C6748 DSP development kit (LCDK). I want to interface DDR2-RAM (MT47H64M16NF-25E AIT:M). 

  The maximum frequency input to the DDR2 controller is 312MHz at 1.3V NOM Operating voltage. Hence the Maximum frequency of DDR_CLK is 156MHz at 1.3V.

  But the PLL operating frequency range is 300MHz to 600MHz. So can I increase the PLL1 frequency from 312MHz to 456MHz?