TDA4VL-Q1: How to Sync the time in TDA4 MidEco

xin lei

Part Number: TDA4VL-Q1

Hi, TI experts ,

Ethernet Switch is not support in our board , so, I may not sync the time in TDA4 according the example showed in SDK(using gPTP) . Do you have any proposal?

over 2 years ago

0 Doredla Sudheer Kumar over 2 years ago

TI__Guru 63280 points

Hi,

You can use CPSW2G in main domain and sync time using ptp.

Refer to below SDK User Guide for PTP usage.
https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j721s2/08_06_01_02/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/CPSW-PTP.html

Best Regards,
Sudheer

0 xin lei over 2 years ago in reply to Doredla Sudheer Kumar

Prodigy 215 points

Hi,

Currently, we don't use ethernet in MCU Domain. I am writing the time to NAVSS0_CPTS register from MCU Domain directly. But it will takes about 4 us delay . So, I have the following questions want to asked :

1. Does TDA4 have other methods to sync from MCU Domain to Main Domain without Ethernet?

2. How much delay is there when using PTP（as you mentioned above）?

0 Doredla Sudheer Kumar over 2 years ago in reply to xin lei

TI__Guru 63280 points

Hi,

xin lei said:
1. Does TDA4 have other methods to sync from MCU Domain to Main Domain without Ethernet?

We are not having Multicore time synchronization support.

Time Sync (CPTS) with external Grandmaster via PTP only supported over Ethernet.

xin lei said:
2. How much delay is there when using PTP（as you mentioned above）?

We are observing the sync deviation in nsec. Please refer to output log from below page.
https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j721s2/08_06_01_02/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/CPSW-PTP.html#ptp-with-ordinary-clock-mac-mode

Above highlighted text is the offset difference between ptp master and slave in nsec.

Best Regards,
Sudheer

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TDA4VL-Q1: How to Sync the time in TDA4 MidEco