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AM4378: About the register setting of CPSW_SL_MACCTRL

user1201164
Expert 1770 points
Part Number: AM4378

Hi,.

We have a question from one of our customers about the setting of CPSW_SL_MACCTRL in Ethernet Subsystem.

What are the IFCTL_A and IFCTL_B settings for Bit[15,16] respectively?
AM437x has 2 ports of EMAC, do you set the transmission rate of RMII (RMII0,RMII1) for each port?

The same question is posted for AM335x in the following forum thread (I believe AM437x is basically the same).
Here it is stated that IFCTL_B is not required, but is the RMII transmission rate not set on a per-port basis, but only determined by IFCTL_A?
If so, is it not possible to change the RMII rate on port1 and 2?
AM335x CPGMAC_SL MAC CONTROL REGISTER - Processors forum - Processors - TI E2E support forums

Best Regards,

Kouji Nishigata

  • 0
    TI__Mastermind 36575 points

    Hi,

    Each port should as you point out will have to have its clock rate set to meet bit rate that Ethernet PHY and is set a per port basis. The AM437 is as you said basically the same as the AM335x. 

    These particular bits are controlled by the respective Linux and RTOS drivers as per the other post. Are you having an issue with this bits?

    Best Regards,

    Schuyler

  • 0 in reply to Schuyler Patton
    Expert 1770 points

    Hi, Schuyler

    Thanks for your reply.

    We have not confirmed this with the customer, but based on their question, they may want to set different speeds for Port 1 and 2.
    In the case of embedded, sometimes there is talk of wanting to limit the speed limit, so this may be the reason.

    What I am wondering is that the AM335x answer says that IFCTL_B setting is not necessary, does it mean that it is not necessary if it is the same as IFCTL_A, or does it mean that it is not possible to set different speeds in the first place (of course what I want to know is about AM4378),

    Best Regards,

    Kouji Nishigata