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DRA829V: How to Cold Reset PCIeSS

Part Number: DRA829V

Hi,

We’ve received a question about PCIe initialization procedure from my customer.

On their custom board, there is no line that can be connected to PERST#.

In order to reproduce the de-assert of PERST#, they are considering to cold reset the PCIeSubSystem (PCIeSS).

It seems that PCIE_RST can be executed from LPSC, but Local Reset = N in Table5-71 in the TRM.

Is there any way to Cold Reset the PCIeSS?

 

Thanks and regards,

Hideaki

  • Hi,

    Could I have any update ?

    Regards,
    Hideaki

  • Hi Hideaki-san,

    We assumed you are wanting to mimic what PERST do to EP, where EP is the DRA829V. Let us know if we misunderstood the customer's question.

    The flow for cold resetting the PCIe subsystem is:

    1. Identify a GPIO pin that must be pinmuxed and monitored by DRA829V-side. Pins are active low
    2. On a GP device (so, non HS high security device), once the monitored GPIO pin gets triggered, follow the section 5.2.2.2.1.5.2 Module State Transitions of the TRM to transition between states to enable PCIe. As a note, x represents the PD Index while y represents the LPSC Index in Table 5-1907. 
    3. As an alternative to 2, there are tisci commands that can be used to set LPSC. However, try directly setting the registers like in step 2 for quick debug and testing purposes.

    For reference, excerpt from Table 5-1907:

    Regards,

    Takuma