• State TI Thinks Resolved
  • Locked Locked
  • Replies 9 replies
  • Answers 1 answer
  • Subscribers 98 subscribers
  • Views 623 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3354: T Lead

Ray Vincent Aranzaso
Mastermind 18180 points
Part Number: AM3354

Hi,

Good Day.

Which option do I have to increase the time between CS going low and the first SCLK? tlead in the picture (please see below)

We need 5 µs. 

Please advise. Thank you very much.

Best Regards,

Ray Vincent

  • 0
    TI__Guru**** 193219 points

    Hello Vincent, 

    Thank you.

    The below diagram provide the information.

    Figure 24-6. Phase and Polarity Combinations

    Looks like the delay is clock dependent.

    Could you ask customer to elaborate the requirements and the need for the delay.

    Based on the above diagram, I guess the delay is fixed based on the clock speed.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Mastermind 18180 points

    Hi Sreenivasa,

    Good Day.

    We would like to request data from a sensor. To get actually data, the sensor uses the time between CS to SCLK to update its SPI output buffer with the latest sensor value.

    Is it possible to switch the CS Pin manually (By HAL write function)? Or can I configure the CS Pin as GPIO (Output Pin) and not select this pin as CS Pin in SPI Interface? (maybe select one other pin which is not connected?)

    Best Regards,

    Ray Vincent

     

  • 0 in reply to Ray Vincent Aranzaso
    TI__Guru**** 193219 points

    Hello Ray Vincent

    Thank you for the inputs.

    Ray Vincent Aranzaso said:
    Is it possible to switch the CS Pin manually (By HAL write function)? Or can I configure the CS Pin as GPIO (Output Pin) and not select this pin as CS Pin in SPI Interface? (maybe select one other pin which is not connected?)

    This could be a possible option. Do you have a setup to test?

    Other option is to reduce the interface speed. Any thoughts on the speed requirement?

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Mastermind 18180 points

    Hi Sreenivasa,

    Good Day.

    Which could be a possible option?

    Option 1:

    Is it possible to switch the CS Pin manually (By HAL write function)?

    Option 2:

    Or can I configure the CS Pin as GPIO (Output Pin) and not select this pin as CS Pin in SPI Interface? (maybe select one other pin which is not connected?)

    Which Option would you prefer?

    Reducing interface Clock frequency is not really an option. We have to send 40 Bytes each 200µs. Currently, we have 3MHz and take about 140 -150 µs.   

    Best Regards,

    Ray Vincent

  • 0 in reply to Ray Vincent Aranzaso
    TI__Guru**** 193219 points

    Hello Ray Vincent

    Good morning and thank you for the inputs.

    Ray Vincent Aranzaso said:

    Option 2:

    Or can I configure the CS Pin as GPIO (Output Pin) and not select this pin as CS Pin in SPI Interface? (maybe select one other pin which is not connected?)

    Which Option would you prefer?

    I would assume this option provides implementation flexibility.

    Ray Vincent Aranzaso said:

    Option 1:

    Is it possible to switch the CS Pin manually (By HAL write function)?

    I will have to check on this method internally based on your requirement.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Mastermind 18180 points

    Hi Sreenivasa,

    Good Day. I would like to follow up on the customer's query. Thank you very much.

    Best Regards,

    Ray Vincent

  • 0 in reply to Ray Vincent Aranzaso
    TI__Guru**** 193219 points

    Hello Ray Vincent

    Thank you.

    Please refer the answer i copied from the previous thread. 

    Good morning and thank you for the inputs.

    Ray Vincent Aranzaso said:

    Option 2:

    Or can I configure the CS Pin as GPIO (Output Pin) and not select this pin as CS Pin in SPI Interface? (maybe select one other pin which is not connected?)

    Which Option would you prefer?

    I would assume this option provides implementation flexibility.
    regards, 
    Sreenivasa
  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 193219 points

    Hello Ray Vincent

    Pls refer below inputs i received from the device expert:

    Normally, you could use TCS to increase the delay between CS and the first clock.

     However, in this case, with a 3MHz clock, the maximum delay would only be 3.5 * 333ns = 1.16us.   This is short of the required 5us.

     The two alternate options, slowing the bit rate or manually controlling the CS are both valid.

     Since, reducing the frequency is not an option, then it will be necessary to manually Controlling CS. It is documented in the TRM:

     24.3.2.6 Single-Channel Master Mode

    Manual control can be implemented by a GPO, but I believe the MCSPI_CHxCONF:FORCE bit can also be used.  See TRM section reference above and see table 24-18.

     There are restrictions which are documented in the TRM.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 193219 points

    Hello Ray Vincent

    Just added your query regarding the findability in the TRM.

    Please refer Page 4899 and page 4937.

    Regards,

    Sreenivasa