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AM3352: How to write data to and read from the RAM (not CPU cache) in SPL

Part Number: AM3352

Dear sir,

I am using AM3352 processor and got the SDK with version (PROCESSOR-SDK-LINUX-AM335X Ver.8.2.0.24).
In my program I want to check sdram set on my board when booting up linux, so I just wrote code at SPL like that showed below.

Ex.

*(int*)(0x80000000) = 1 ;  /* sdram address */

/* do something to flush data to memory from the cache,  */
/* and set invalidate to guarantee data read from memory.  */

a = *(int*)(0x80000000) ; /* read data from memory */

if ( a != 1 ){
    /* bad memory */
}

My question is that:
In SPL process, which function can I use to guarantee the data be written to main memory (dram), and read from it, but not the CPU cached data ?

regards

Xitong Zhang