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speed up the read time on C6727 memory access

Customer uses the C6727 and says that his read time from external memory is 10 MHz where read time from C6713 is 50 MHz. He wants to know if there might be a way he can speed up the read time on C6727

 They are accessing non-cacheable memory.  In the C6713 the processor reads what looks like a cache line so it generates one read command followed by reads every clock cycle for N number of cycles.  In the C6727 it generates a read command, reads a words, generates another read command followed by a read, etc.  Each time a new read command is issued, there is the bus turn around and latency that slows down the transaction.

  • There's no data cache on 672x so this isn't terribly unexpected.  Using the dMAX to do the accesses might improve things, though even then I'm not positive.  The 674x returns to an architecture that is more similar to the 671x.  Perhaps they should consider using one of those devices.

  • What speed is the EMIF running at? What speed is the CPU running at?

    What type of memory is being accessed? SDRAM or async?

    Have you confirmed that the EMIF timing registers are set right for the EMIF speed and the memory device?