Champs,
Figure 6-1259. Power-up/Boot Timing Chart in the TRM shows that the MCU_ERRORn is supposed to transition from low to high upon successful boot but there is no explanation how it is supposed to happen and who takes care of it. My customer would like to use the signal as an indicator of successful or failed boot and would like to better understand the handling of this pin during boot process. few questions here:
1. MCU_ERRORn is always driven low coming out of reset, correct?
2. Does ROM boot loader do anything on this pin (SMS0/M4 ROM)?
3. Referring to TRM's Figure 5-3. Boot Process: assuming successful boot the MCU_ERRORn is driven high at some point after Image Integrity verification. Where exactly does it happen?
4. Assuming the boot failed and the M4 WD timed out after 3 min: the MCU_ERRORn should stay low waiting for R5 reset. Can it be used as a reliable indication of the failure, i.e. will it always end up there regardless of the boot scenario, correct?
Thanks
Michael
 
				 
		 
					 
                           
				