PROCESSOR-SDK-AM64X: MCU domain GPIO is not mapped to a gpiochip.

rjh

Prodigy 85 points

Part Number: PROCESSOR-SDK-AM64X
Other Parts Discussed in Thread: TMDS64EVM

TMDS64EVM:MCU domain GPIO is not mapped to a gpiochip.

HI,

1.Environment:

SDK:processor_sdk_08_06_00_42

2.We would like to use the MCU domain GPIO inside of Linux.Below is our device tree configuration:

&mcu_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_gpio_pins_default>;

	mcu_gpio_pins_default: mcu_gpio_pins_default {
		pinctrl-single,pins = <
			/* MCU I/O J12*/
			AM64X_MCU_IOPAD(0x0004, PIN_INPUT, 7) /* (C6) MCU_SPI0_CS1.MCU_GPIO0_12 */
			AM64X_MCU_IOPAD(0x0020, PIN_INPUT, 7) /* (C7) MCU_SPI1_D0.MCU_GPIO0_ 8 */
			AM64X_MCU_IOPAD(0x0014, PIN_INPUT, 7) /* (A7) MCU_SPI1_CS0.MCU_GPIO0_5  */
			AM64X_MCU_IOPAD(0x001C, PIN_INPUT, 7) /* (D7) MCU_SPI1_CLK.MCU_GPIO0_7  */
			AM64X_MCU_IOPAD(0x0030, PIN_INPUT, 7) /* (D8) MCU_UART0_CTSn.MCU_GPIO0_1 */
			AM64X_MCU_IOPAD(0x0034, PIN_INPUT, 7) /* (E8) MCU_UART0_RTSn.MCU_GPIO0_0 */
			AM64X_MCU_IOPAD(0x004C, PIN_INPUT, 7) /* (A10) MCU_I2C0_SDA.MCU_GPIO0_19  */
			AM64X_MCU_IOPAD(0x0010, PIN_INPUT, 7) /* (B6) MCU_SPI0_D1.MCU_GPIO0_4  */
			AM64X_MCU_IOPAD(0x000C, PIN_INPUT, 7) /* (E7) MCU_SPI0_D0.MCU_GPIO0_10  */
			AM64X_MCU_IOPAD(0x0000, PIN_INPUT, 7) /* (D6) MCU_SPI0_CS0.MCU_GPIO0_13  */
			AM64X_MCU_IOPAD(0x0018, PIN_INPUT, 7) /* (B7) MCU_SPI1_CS1.MCU_GPIO0_6  */
			AM64X_MCU_IOPAD(0x0040, PIN_INPUT, 7) /* (B8) MCU_UART1_CTSn.MCU_GPIO0_16  */
			AM64X_MCU_IOPAD(0x0024, PIN_INPUT, 7) /* (C8) MCU_SPI1_D1.MCU_GPIO0_9  */
			AM64X_MCU_IOPAD(0x0054, PIN_INPUT, 7) /* (B10) MCU_I2C1_SDA.MCU_GPIO0_21  */
			AM64X_MCU_IOPAD(0x0008, PIN_INPUT, 7) /* (E6) MCU_SPI0_CLK.MCU_GPIO0_11  */
			AM64X_MCU_IOPAD(0x0050, PIN_INPUT, 7) /* (A11) MCU_I2C1_SCL.MCU_GPIO0_20  */
			AM64X_MCU_IOPAD(0x0048, PIN_INPUT, 7) /* (E9) MCU_I2C0_SCL.MCU_GPIO0_18  */
		>;
	};
};

/* mcu_gpio0 is reserved for mcu firmware usage */
&mcu_gpio0 {
	status = "okay";
};

I have updated the mcu_gpio status from "reserved" to "okay",but it doesn't seem to work.

cat /sys/kernel/debug/gpio
gpiochip2: GPIOs 335-422, parent: platform/601000.gpio, 601000.gpio:
 gpio-340 (                    |rts                 ) out lo ACTIVE LOW
 gpio-343 (                    |user-led0           ) out lo
 gpio-360 (                    |rts                 ) out lo ACTIVE LOW
 gpio-363 (                    |user-led1           ) out lo
 gpio-405 (                    |user-key0           ) in  hi ACTIVE LOW

gpiochip1: GPIOs 423-509, parent: platform/600000.gpio, 600000.gpio:
 gpio-436 (                    |heartbeat           ) out lo
 gpio-437 (                    |heartbeat_2         ) out lo

gpiochip0: GPIOs 510-511, parent: platform/3b000000.memory-controller, omap-gpmc:

MCU domain GPIO is not mapped to a gpiochip.How do I make it work？

Regards,

rjh

over 2 years ago

0 Bin Liu over 2 years ago

TI__Guru**** 168291 points

Hi,

What is the output of the following command on your board?

# ls -l /sys/class/gpio/

0 rjh over 2 years ago in reply to Bin Liu

Prodigy 85 points

HI,

Here is the output：

ls -l /sys/class/gpio/

total 0
--w------- 1 root root 4096 Mar  2 09:15 export
lrwxrwxrwx 1 root root    0 Mar  2 09:15 gpiochip335 -> ../../devices/platform/bus@f4000/601000.gpio/gpio/gpiochip335
lrwxrwxrwx 1 root root    0 Mar  2 09:15 gpiochip423 -> ../../devices/platform/bus@f4000/600000.gpio/gpio/gpiochip423
lrwxrwxrwx 1 root root    0 Mar  2 09:15 gpiochip510 -> ../../devices/platform/bus@f4000/3b000000.memory-controller/gpio/gpiochip510
--w------- 1 root root 4096 Mar  2 09:15 unexport

Regards,

rjh

0 rjh over 2 years ago in reply to Bin Liu

Prodigy 85 points

Hi,

Is there any solution, please?

0 rjh over 2 years ago in reply to Bin Liu

Prodigy 85 points

Hi,

We hope to be able to test those gpios soon, please reply as soon as possible.

Regards,

rjh

0 Bin Liu over 2 years ago in reply to rjh

TI__Guru**** 168291 points

Hi,

Please apply the following kernel patch for enabling mcu gpio in Linux. I will file a bug ticket to our sw dev team to get this fixed in the next SDK release.

diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
index 09a668af9fd3..41ddb5b70384 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
@@ -86,7 +86,7 @@ mcu_gpio_intr: interrupt-controller1 {
        };
 
        mcu_gpio0: gpio@4201000 {
-               compatible = "ti,am64-gpio", "keystone-gpio";
+               compatible = "ti,am64-gpio", "ti,keystone-gpio";
                reg = <0x0 0x4201000 0x0 0x100>;
                gpio-controller;
                #gpio-cells = <2>;

0 rjh over 2 years ago in reply to Bin Liu

Prodigy 85 points

Hi,

Now using the patch you provided, we can configure the MCU domain GPIO, but when I configure them all to output and test their high and low levels, I find that only two pins（E9 and A10）are normal, and the rest cannot output high and low levels.

I tried reading the registers of those GPIOs that could not output high and low levels, I found their status to be disable.

Here is an example of the C6（cannot output high and low levels）:

# devmem2 0x04084004 
/dev/mem opened.
Memory mapped at address 0xffff8050c000.
Read at address  0x04084004 (0xffff8050c004): 0x00214007

Here is an example of the E9（can output high and low levels）:

# devmem2 0x04084048
/dev/mem opened.
Memory mapped at address 0xffff91640000.
Read at address  0x04084048 (0xffff91640048): 0x00054007

I try to enable C6 gpio and write the value to the C6 register and read it again, but the value of the register does not change：

# devmem2 0x04084004 w 14007
/dev/mem opened.
Memory mapped at address 0xffff8a759000.
Read at address  0x04084004 (0xffff8a759004): 0x00214007
Write at address 0x04084004 (0xffff8a759004): 0x000036B7, readback 0x000036B7

# devmem2 0x04084004
/dev/mem opened.
Memory mapped at address 0xffffa4674000.
Read at address  0x04084004 (0xffffa4674004): 0x00214007

I wonder why most of the mcu gpio states disabled？

What is the difference between normal gpios and an abnormal gpios？

Regards,

rjh

+1 Bin Liu over 2 years ago in reply to rjh

TI__Guru**** 168291 points

Hi,

Please apply the following u-boot patch and rebuild the u-boot to see if this solves the issue.

diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index ff0a357b9b15..d262a119ee28 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -36,7 +36,8 @@
 
 static void ctrl_mmr_unlock(void)
 {
-       /* Unlock all PADCFG_MMR1 module registers */
+       /* Unlock all PADCFG_MMR module registers */
+       mmr_unlock(PADCFG_MMR0_BASE, 1);
        mmr_unlock(PADCFG_MMR1_BASE, 1);
 
        /* Unlock all MCU_CTRL_MMR0 module registers */
diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
index 43cf76bdf4c5..001480fd005b 100644
--- a/arch/arm/mach-k3/include/mach/am64_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
@@ -10,6 +10,7 @@
 #define CTRL_MMR0_BASE                                 0x43000000
 #define CTRLMMR_MAIN_DEVSTAT                           (CTRL_MMR0_BASE + 0x30)
 
+#define PADCFG_MMR0_BASE                               0x04080000
 #define PADCFG_MMR1_BASE                               0xf0000
 
 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK             0x00000078

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PROCESSOR-SDK-AM64X: MCU domain GPIO is not mapped to a gpiochip.