Dear Sir,
Customer has a AM623x + PMIC TPS6521901 design and has some ideas to improve watchdog design and some questions below
Context
At a high level, our watchdog's main purpose to power cycle during system lockup and we implement software to count failed boots and fail over to a different flash partition with a known working system image.
With the current design, the hardware watchdog bite sends a pulse to the PMIC PB/EN/VSENSE pin, which allows us to differentiate between a cold boot and watchdog-intitiated reset. Since the PMIC will cut power to the CPU, we'd have to keep our bootcount and other failover related information on flash (we're trying to minimize flash writes to reach an 18 year device lifespan).
We'd like to see if we can implement this scheme using the AM62x RTI WWDT. We see there is a driver already in the Linux kernel, but we'd need to start it in u-boot. The main advantage we see of using this would be that we could potentially use a segment of on-chip memory to keep our boot counter and a few other bits of information.
Question
So right off the bat, we'd need to know if there was a piece of on-chip memory available to us where u-boot could write some data, that would be available when Linux boots, and would not get cleared if the WWDT bites. Even a hint to the right section of the technical reference manual would be much appreciated!
We see other options where external WDT is connected differently but we'll save that discussion after we hear back about the memory.
Hopefully I explained that clearly.
BR, Rich
