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C6416 TCP

Hi

I am having a problem with getting the TCP module to generate an interrupt. I've configured the EDMA module correctly and I tested my understanding of interrupts by using and MCBSP to send dummy data and generate an EDMA event. The problem is that the TCP doesn't generate and interrupt after the function TCP_start() has been called. When the TCP_start() function has been called the TCP is supposed to generate a TCPXEVT which will trigger an EDMA hardware interrupt.

Has anybody worked with the EDMA and TCP modules and can you show me how you configured things so I can check my configuration against yours?

Thank you

 

 

  • I have managed to get TCP working. I suggest you to check TCP registers to find its state and possible errors. Here is piece of code I derived from examples posted  in this group. But besides it still there is some job.

    typedef struct _tcp_dma     /* Resourses for TCP transfers */
    {   
        EDMA_Config cfg_TCP_R0; /* Hard decision transfer from TCP                          */
        EDMA_Config cfg_TCP_R1; /* Output TCP parameters transfer from TCP                  */
        EDMA_Config cfg_TCP_X0; /* TCP configuration registers  transfer                    */
        EDMA_Config cfg_TCP_X1; /* Systematic and parity bits  transfer to TCP              */
        EDMA_Config cfg_TCP_X2; /* Turbo coder internal inteleaver indices transfer to TCP  */
        //
        EDMA_Handle hdl_TCP_R0; /* handle to TCP Receive  Event Channel                     */
        EDMA_Handle hdl_TCP_X0; /* handle to TCP Transmit Event Channel                     */
        EDMA_Handle hdl_TCP_R1; /* handle to PARAM reload table of TCP receive event link 1 */
        EDMA_Handle hdl_TCP_X1; /* handle to PARAM reload table of TCP xmit event link 1    */
        EDMA_Handle hdl_TCP_X2; /* handle to PARAM reload table of TCP xmit event link 2    */
    } tcp_dma_str;

        /*-------------------------------------------------------------------------*/

        /*----------------- Prepare TCP configuration parameters ------------------*/
        /*-------------------------------------------------------------------------*/
        tcp_baseparam.standard      = TCP_STANDARD_3GPP;
        tcp_baseparam.rate          = TCP_RATE_1_3;
        tcp_baseparam.intFlag       = TCP_IC0_INTER_YES;
        tcp_baseparam.outParmFlag   = TCP_IC0_OUTF_YES;
        tcp_baseparam.frameLen      = FL;
        tcp_baseparam.prologSize    = P;
        tcp_baseparam.maxIter       = cs->max_it;
        tcp_baseparam.snr           = cs->snr_threshold;
        tcp_param.mode              = TCP_MODE_SA;
        TCP_genParams(&tcp_baseparam, &tcp_param);
        TCP_genIc(&tcp_param, xabData, &tcp_config);

        /*-------------------------------------------------------------------------*/
        /*-------------- Prepare EDMA Links configuration parameters --------------*/
        /*-------------------------------------------------------------------------*/
        EDMA_reset(dma->hdl_TCP_R0);
        EDMA_reset(dma->hdl_TCP_X0);

        // Configure channel parameters for IC registers
        //edma_TCPXEVT_Link0.opt
        dma->cfg_TCP_X0.opt = EDMA_OPT_RMK( EDMA_OPT_PRI_LOW,     
                                            EDMA_OPT_ESIZE_32BIT,
                                            EDMA_OPT_2DS_NO,      
                                            EDMA_OPT_SUM_INC,
                                            EDMA_OPT_2DD_NO,      
                                            EDMA_OPT_DUM_INC,
                                            EDMA_OPT_TCINT_NO,    
                                            EDMA_OPT_TCC_DEFAULT,
                                            EDMA_OPT_TCCM_DEFAULT,
                                            EDMA_OPT_ATCINT_NO,
                                            EDMA_OPT_ATCC_DEFAULT,
                                            EDMA_OPT_PDTS_DISABLE,
                                            EDMA_OPT_PDTD_DISABLE,
                                            EDMA_OPT_LINK_YES,
                                            EDMA_OPT_FS_YES
                                          );
        dma->cfg_TCP_X0.src = (Uint32)(&cs->tcp_config);
        dma->cfg_TCP_X0.cnt = (Uint32)TCP_NUM_IC;
        dma->cfg_TCP_X0.dst = (Uint32)TCP_ICMEM_ADDR;
        dma->cfg_TCP_X0.idx = 0;
        dma->cfg_TCP_X0.rld = 0;

        // Configure channel for systematic and parities data
        frameCount     = TCP_normalCeil((FL * cs->tcp_baseparam.rate), 4 * cs->tcp_param.numSysPar);
        elementCount   = 2 * TCP_normalCeil((FL * cs->tcp_baseparam.rate), (8 * frameCount));
        dma->cfg_TCP_X1.opt = dma->cfg_TCP_X0.opt;  // Reuse most options from X0
        dma->cfg_TCP_X1.src = (Uint32)cs->s_p;
        dma->cfg_TCP_X1.cnt = EDMA_CNT_RMK(frameCount - 1, elementCount);
        dma->cfg_TCP_X1.dst = (Uint32)TCP_SPMEM_ADDR;
        dma->cfg_TCP_X1.idx = 0;
        dma->cfg_TCP_X1.rld = 0;

        // Configure channel parameters for interleaver data
        frameCount     = TCP_normalCeil(FL, (2 * cs->tcp_param.numInter));
        elementCount   = 2 * TCP_normalCeil(FL, 4 * frameCount);
        dma->cfg_TCP_X2.opt = dma->cfg_TCP_X0.opt;  // Reuse most options from X0
        dma->cfg_TCP_X2.src = (Uint32)cs->interl;
        dma->cfg_TCP_X2.cnt = EDMA_CNT_RMK(frameCount - 1, elementCount);
        dma->cfg_TCP_X2.dst = (Uint32)TCP_ILMEM_ADDR;
        dma->cfg_TCP_X2.idx = 0;
        dma->cfg_TCP_X2.rld = 0;

        // Configure channel parameters for hard decision data
        frameCount     = TCP_normalCeil(FL, (32 * cs->tcp_param.numHd));
        elementCount   = 2 * TCP_normalCeil(FL, 64 * frameCount);
        dma->cfg_TCP_R0.opt = dma->cfg_TCP_X0.opt;  // Reuse most options from X0
        dma->cfg_TCP_R0.src = TCP_HDMEM_ADDR;
        dma->cfg_TCP_R0.cnt = EDMA_CNT_RMK(frameCount - 1, elementCount);
        dma->cfg_TCP_R0.dst = (Uint32)(&cs->hd[0]);
        dma->cfg_TCP_R0.idx = 0;
        dma->cfg_TCP_R0.rld = 0;

        // Configure channel parameters for TCP output parameters
        dma->cfg_TCP_R1.opt = EDMA_OPT_RMK( EDMA_OPT_PRI_LOW,        
                                            EDMA_OPT_ESIZE_32BIT,
                                            EDMA_OPT_2DS_NO,      
                                            EDMA_OPT_SUM_INC,
                                            EDMA_OPT_2DD_NO,      
                                            EDMA_OPT_DUM_INC,
                                            EDMA_OPT_TCINT_YES,   
                                            EDMA_OPT_TCC_OF(EDMA_CHA_TCPREVT),
                                            EDMA_OPT_TCCM_OF(EDMA_CHA_TCPREVT >> 4),  
                                            EDMA_OPT_ATCINT_NO,
                                            EDMA_OPT_ATCC_DEFAULT,
                                            EDMA_OPT_PDTS_DISABLE,
                                            EDMA_OPT_PDTD_DISABLE,
                                            EDMA_OPT_LINK_YES,
                                            EDMA_OPT_FS_YES
                                         );
        dma->cfg_TCP_R1.src = (Uint32)TCP_OPMEM_ADDR;
        dma->cfg_TCP_R1.cnt = (Uint32)TCP_NUM_OP;
        dma->cfg_TCP_R1.dst = (Uint32)cs->out_p;
        dma->cfg_TCP_R1.idx = 0;
        dma->cfg_TCP_R1.rld = 0;

        // Set up the EDMA channel using the configuration structure.
        EDMA_config(dma->hdl_TCP_X0, &dma->cfg_TCP_X0);
        EDMA_config(dma->hdl_TCP_X1, &dma->cfg_TCP_X1);
        EDMA_config(dma->hdl_TCP_X2, &dma->cfg_TCP_X2);
        EDMA_config(dma->hdl_TCP_R0, &dma->cfg_TCP_R0);
        EDMA_config(dma->hdl_TCP_R1, &dma->cfg_TCP_R1);

        // Setup event links
        EDMA_link(dma->hdl_TCP_X0, dma->hdl_TCP_X1);
        EDMA_link(dma->hdl_TCP_X1, dma->hdl_TCP_X2);
        EDMA_link(dma->hdl_TCP_X2, EDMA_hNull);     // Link the last Transmit transfer to NULL parameter set
        EDMA_link(dma->hdl_TCP_R0, dma->hdl_TCP_R1);
        EDMA_link(dma->hdl_TCP_R1, EDMA_hNull);     // Link the last Receive  transfer to NULL parameter set

        // Enable an EDMA channel by setting the corresponding bit in the EDMA event enable register.
        EDMA_enableChannel(dma->hdl_TCP_X0);
        EDMA_enableChannel(dma->hdl_TCP_R0);

        // Enable a transfer completion interrupt by modifying the CIER register appropriately.
        EDMA_intEnable(EDMA_CHA_TCPREVT);
       
        INTR_ENABLE(EDMA_INT_MASK);

  • After looking at your code I realize that I did shift the TCCM number by for as you did i.e. EDMA_OPT_TCCM_OF(EDMA_CHA_TCPREVT >> 4).

    Thank you.

  • Weziwe,

    Igama lami uKhosi Morafo. Ngidinga ukukhuluma nawe mayelana ne project engicabanga ukuthi ungaba interested kuyona. Ngizamile ukukuthinta ku 0727806593 but ngahluleka. Ngicela ungifonele kule namba, 0823414062 noma ungithumele i email ku khosimorafo@yahoo.com.

    Thanks Chief!