TDA4A/V Entry - VPAC3L: 4K/60FPS

Mariusz Madry

Hello TI Experts

I'd like to know it the ISP of TDA4A/V Entry can serve 3848 x 2168 sensor with 60 FPS utilizing all the blocks (including CAC, LENC)?
My understanding is the the maximum load for the VPAC3L is 480Mpx/s
The desired pixel load is about 500.5 Mpx/s.

Is it possible for 'Entry' or 'Superset(s)' (except TDA4V Low) has to be considered?

over 2 years ago

+1 Gang Hua over 2 years ago

TI__Guru 59100 points

I would not recommend going above 480MP/s if that is the stated limitation.

0 Mariusz Madry over 2 years ago in reply to Gang Hua

Prodigy 30 points

Thank you very much.
Noted: To have the system stable do not exceed the limit!

0 Mariusz Madry over 2 years ago in reply to Gang Hua

Prodigy 30 points

Hi Gang,

One more question. If I preserve the 480MP/s limit I can still fully utilized (up to their limit) all the ISP blocks (CAC, LENC, NR, etc)? Or I should consider that in that case the pixel band limit will be reduced?

+1 Gang Hua over 2 years ago in reply to Mariusz Madry

TI__Guru 59100 points

I suppose VPAC runs at 600MHz (please correct me if I am wrong about this) and with 80% utilization counting all VPAC overhead (blanking etc.) we get the 480MP/s limit.

CAC/NR are in the VISS pipeline and shall not cause any additional overhead.

LENC (aka LDC; not in pipeline) causes its own DDR traffic and therefore are also subject to DD bandwidth limitation.

0 Mariusz Madry over 2 years ago in reply to Gang Hua

Prodigy 30 points

Thank you very much. Got it.

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TDA4A/V Entry - VPAC3L: 4K/60FPS