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DRA829V: Can SGMII2(QSGMII) and RMII2 be used simultaneously ?

Part Number: DRA829V
Other Parts Discussed in Thread: DRA829, SYSCONFIG

Hi,

Thank you for answering to the following thread.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1215434/dra829v-is-it-possible-to-use-both-cpsw9g-s-sgmii2-qsgmii-and-rmii2-simultaneously/4589111#4589111

but, we still have a few more questions, could you answer the below as well ? 

The DRA829 SGMII2 (QSGMII) and RMII2 have different BALL numbers in "TI SysConfig_1.15.0", so "Resource conflict" does not occur. Can I use SGMII2(QSGMII) and RMII2 as DRA829 at the same time?
If the answer is no, then the printed circuit board needs to be fixed. Is it OK to change the QSGMII channel from SGMII2(QSGMII) to SGMII1(QSGMII)?

When two of QSGMII are used, 2x QSGMII and 6x QSGMII_SUB are used.
If a port of the above QSGMII_SUB is not used as QSGMII, is it possible to use it as RMII ?

Thanks and regards,
Hideaki

  • Hi,

    The DRA829 SGMII2 (QSGMII) and RMII2 have different BALL numbers in "TI SysConfig_1.15.0", so "Resource conflict" does not occur. Can I use SGMII2(QSGMII) and RMII2 as DRA829 at the same time?

    As mentioned above both SGMII and RMII points to same MAC Port-2, It can't support two interfaces simultaneously.

    If the answer is no, then the printed circuit board needs to be fixed. Is it OK to change the QSGMII channel from SGMII2(QSGMII) to SGMII1(QSGMII)?

    In EVM only Port-2 mapped to the QSGMII interface, and SerDes Lane which is mapped to Port-1 (SerDes0 Lane0) is connected tor PCIe.
    So, you can't use SGMII1(QSGMII) instead of SGMII2(QSGMII).

    If you have custom board where SerDes0 Lane0 not used and have a provision for QSGMII then you can use SGMII1 instead of SGMII2.

    Best Regards,
    Sudheer.

  • Hi Sudheer,

    Thank you for your answers. The customer underdtood that SGMII2 and RMII2 can't support simultaneously..

    However, they want to confirm that these ports can be set simultaneously in the SYSCONFIG. Is it SYCONFIG's bug ?

    Thanks and regards,
    Hideaki

  • Hi,

    However, they want to confirm that these ports can be set simultaneously in the SYSCONFIG. Is it SYCONFIG's bug ?

    As Pins were different we can set pin mux simultaneously, but interface will be based on the port configuration from application it means either of Pin mux configuration (RMII2/SGMII2) to be used/called in application both can't be at the same time.

    Best Regards,
    Sudheer