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about interrupt vectors table

YongchaoDeng
Intellectual 965 points
Other Parts Discussed in Thread: TMS320C6713B

Now , i attach vecs_timer1.asm:

******************************************************


* Copyright (C) 2003 Texas Instruments Incorporated
* All Rights Reserved
*
*
*---------vecs_timer1.asm---------
*
* Assembly file to set up interrupt service table (IST)
*

*------------------------------------------------------------------------------
* Global symbols defined here and exported out of this file
*------------------------------------------------------------------------------
   .global _vectors
   .global _c_int00
   .global _vector1
   .global _vector2
   .global _vector3
   .global _vector4
   .global _vector5
   .global _vector6
   .global _vector7
   .global _vector8
   .global _vector9  
   .global _vector10
   .global _vector11  
   .global _vector12 
   .global _vector13  
   .global _c_int14  ; Hookup the c_int14 ISR in main()
   .global _vector15

*------------------------------------------------------------------------------
* Global symbols referenced in this file but defined somewhere else.
* Remember that your interrupt service routines need to be referenced here.
*------------------------------------------------------------------------------
   .ref _c_int00

*------------------------------------------------------------------------------
* This is a macro that instantiates one entry in the interrupt service table.
*------------------------------------------------------------------------------
VEC_ENTRY .macro addr
    STW   B0,*--B15
    MVKL  addr,B0
    MVKH  addr,B0
    B     B0
    LDW   *B15++,B0
    NOP   2
    NOP  
    NOP  
   .endm


*------------------------------------------------------------------------------
* This is a dummy interrupt service routine used to initialize the IST.
*------------------------------------------------------------------------------
_vec_dummy:
  B    B3
  NOP  5

*------------------------------------------------------------------------------
* This is the actual interrupt service table (IST). It is properly aligned and
* is located in the subsection .text:vecs. This means if you don't explicitly
* specify this section in your linker command file, it will default and link
* into the .text section. Remember to set the ISTP register to point to this
* table.
*------------------------------------------------------------------------------
 .sect ".text:vecs"
 .align 1024

_vectors:
_vector0:   VEC_ENTRY _c_int00    ;RESET
_vector1:   VEC_ENTRY _vec_dummy  ;NMI
_vector2:   VEC_ENTRY _vec_dummy  ;RSVD
_vector3:   VEC_ENTRY _vec_dummy
_vector4:   VEC_ENTRY _vec_dummy
_vector5:   VEC_ENTRY _vec_dummy
_vector6:   VEC_ENTRY _vec_dummy
_vector7:   VEC_ENTRY _vec_dummy
_vector8:   VEC_ENTRY _vec_dummy
_vector9:   VEC_ENTRY _vec_dummy
_vector10:  VEC_ENTRY _vec_dummy
_vector11:  VEC_ENTRY _vec_dummy
_vector12:  VEC_ENTRY _vec_dummy
_vector13:  VEC_ENTRY _vec_dummy
_vector14:  VEC_ENTRY _c_int14  ; Hookup the c_int14 ISR in main()
_vector15:  VEC_ENTRY _vec_dummy

*------------------------------------------------------------------------------

1        Hi,I don't understand the programme in vecs_timer1.asm file as follows.
******************
VEC_ENTRY .macro addr
    STW   B0,*--B15
    MVKL  addr,B0
    MVKH  addr,B0
    B     B0
    LDW   *B15++,B0
    NOP   2
    NOP  
    NOP  
   .endm
*********************
2         What's the functions about B0 and B15?

           When isr return,are there must 5 instructions followed that are  LDW   *B15++,B0    NOW 2         NOP             NOP?

           Is there must return instruction in the end of isr (c programme)?

3       I think we set address of interrupt programme in the ist and there are eight 32-bit instructions in each fetch package.In the macro of VEC_ENTRY,there are eight instructions.What's the meaning of B B3? 

         I think each  interrupt vector in ist locate on the fetch package boundary,so there are 20h byte offset between each interrupt vector(address of  isr).Is that right? 

 *------------------------------------------------------------------------------
* This is a dummy interrupt service routine used to initialize the IST.
*------------------------------------------------------------------------------
_vec_dummy:
  B    B3
  NOP  5

*------------------------------------------------------------------------------

4       And in time1.c programme,i don't understand the programme set IRQ as follows:

extern far void vectors();

 IRQ_setVecs(vectors);

I want to know the address of vectors() and what's the value about ISTP that is the address of IST.

5      Now i use tms320c6713b and I think DSP/BIOS is os on dsp, can i do my work without dsp/bios? What's the difference between DSP/BIOS and no DSP/BIOS project?

  • 0
    TI__Guru 64470 points

    YongchaoDeng said:

    1        Hi,I don't understand the programme in vecs_timer1.asm file as follows.
    ******************
    VEC_ENTRY .macro addr
        STW   B0,*--B15
        MVKL  addr,B0
        MVKH  addr,B0
        B     B0
        LDW   *B15++,B0
        NOP   2
        NOP  
        NOP  
       .endm
    *********************
    2         What's the functions about B0 and B15?

    I would suggest that you reference the TMS320C6000 Assembly Language Tools v 6.1 User's Guide (SPRU186) in the Macros Description section.  A macro allows you to define a consistent structure for common tasks such as the code at the interrupt service table.  As you noted, the interrupt vector has 8 32-bit words and incidentally this macro VEC_ENTRY has 8 instructions (32-bits).  The argument to the macro is addr.  When the assembler parses the code, it will perform the substitution of addr with the actual value passed into the macro's argument.

    In the example you provided, the first entry in the vector table was actually to _c_int00.  This is the reset vector and the macro will branch to the label _c_int00, which is what we want on reset.  The other vector entries all branch to _vec_dummy, with the exception of one which goes to _c_int14.  _vec_dummy is simply a function.  In this particular case, _vec_dummy branches to the address contained in register B3 of the CPU.  Incidentally, B3 contains the return address in the conventions of the C compiler.  This is documented in Section 7.3 of the TMS320C6000 Optimizing Compiler User's Guide (SPRU187) in Table 7-2.

     

    YongchaoDeng said:

               When isr return,are there must 5 instructions followed that are  LDW   *B15++,B0    NOW 2         NOP             NOP?

               Is there must return instruction in the end of isr (c programme)?

    The VEC_ENTRY is not the interrupt service routine.  It is part of the interrupt vector which handles branching to the address contained in the macro argument addr.  That is all.  The interrupt service routine is your own function which you specify the address to in the macro addr argument.  In your interrupt service routine, yes, you need to return.  All this VEC_ENTRY macro does is branch to your interrupt service routine.

     

    YongchaoDeng said:

    3       I think we set address of interrupt programme in the ist and there are eight 32-bit instructions in each fetch package.In the macro of VEC_ENTRY,there are eight instructions.What's the meaning of B B3? 

    In the example interrupt service routine, _vec_dummy, the branch instruction (B B3) tells the CPU to branch to the address contained in the CPU register B3, which again happens to contain the return address.

     

    YongchaoDeng said:

             I think each  interrupt vector in ist locate on the fetch package boundary,so there are 20h byte offset between each interrupt vector(address of  isr).Is that right? 

    Yes, this is correct.

     

    YongchaoDeng said:

    4       And in time1.c programme,i don't understand the programme set IRQ as follows:

    extern far void vectors();

     IRQ_setVecs(vectors);

    I want to know the address of vectors() and what's the value about ISTP that is the address of IST.

    The address of vectors() is where the global _vectors is located in vecs_timer1.asm.

     

    YongchaoDeng said:

    5      Now i use tms320c6713b and I think DSP/BIOS is os on dsp, can i do my work without dsp/bios? What's the difference between DSP/BIOS and no DSP/BIOS project?

    Yes, you can certainly develop an application that does not utilize DSP/BIOS.

  • 0 in reply to BrandonAzbell
    Intellectual 965 points

    Thank you very much!

    Now ,when i read the example timer1 project in ccs,i cannot find where set up tms320c6713 PLL.In project,i cannot find in gel file,c programme or csl.

    And i cannot find project include pll module of csl module in the file view.

  • 0 in reply to YongchaoDeng
    TI__Mastermind 18130 points

    It depends which GEL file you are using. For example, init6713sim.gel does not include PLL configuration because the simulator does not need PLL configuration. DSP621x_671x.gel adds on to the simulator GEL file, but it also does not configure the PLL because it was written not knowing what hardware you would be using. For example, your board might be running at 200MHz vs. 300MHz, use a different input clock, etc.

    The DSK6713.gel file includes PLL configuration because it was written expecting to be used in conjunction with the DSK6713 board. If you are using custom hardware you probably want to write your own PLL init code anyway to ensure that it will work with your own hardware.

  • 0
    TI__Guru*** 125430 points

    YongchaoDeng said:

    1        Hi,I don't understand the programme in vecs_timer1.asm file as follows.
    ******************
    VEC_ENTRY .macro addr
        STW   B0,*--B15
        MVKL  addr,B0
        MVKH  addr,B0
        B     B0
        LDW   *B15++,B0
        NOP   2
        NOP  
        NOP  
       .endm
    *********************

    B15 is the stack pointer.  B0 is just used as temp storage for a pointer.  The above code pushes B0 to the stack, assigns the value "addr" to B0, branches to B0, then pops the original B0 off the stack.

    YongchaoDeng said:

    2         What's the functions about B0 and B15?

               When isr return,are there must 5 instructions followed that are  LDW   *B15++,B0    NOW 2         NOP             NOP?

               Is there must return instruction in the end of isr (c programme)?

    This is the only code that should be assembly in your system.  Write your ISR in C and use the interrupt keyword, e.g.

    interrupt void my_isr()

    YongchaoDeng said:

    3       I think we set address of interrupt programme in the ist and there are eight 32-bit instructions in each fetch package.In the macro of VEC_ENTRY,there are eight instructions.What's the meaning of B B3? 

             I think each  interrupt vector in ist locate on the fetch package boundary,so there are 20h byte offset between each interrupt vector(address of  isr).Is that right? 

     *------------------------------------------------------------------------------
    * This is a dummy interrupt service routine used to initialize the IST.
    *------------------------------------------------------------------------------
    _vec_dummy:
      B    B3
      NOP  5

    *------------------------------------------------------------------------------

    If I recall correctly the B3 register gets used for the return address when making a C function call.  That doesn't make much sense in the vector table in my opinion.  I think it would be better to have something that just branches to itself so that it "sticks" in that location.

    YongchaoDeng said:

    4       And in time1.c programme,i don't understand the programme set IRQ as follows:

    extern far void vectors();

     IRQ_setVecs(vectors);

    I believe that's just setting up ISTP to point to the vector table.

    YongchaoDeng said:

    I want to know the address of vectors() and what's the value about ISTP that is the address of IST.

    5      Now i use tms320c6713b and I think DSP/BIOS is os on dsp, can i do my work without dsp/bios? What's the difference between DSP/BIOS and no DSP/BIOS project?

    See the map file generated by the linker if you want to know the address of vectors.  Make sure it's allocated on a 1KB boundary.  There's probably an assembly directive that could be used in the vectors.asm or else it could be done in the linker command file as well.

    It's up to you whether or not to use BIOS.  Personally I think BIOS is a fantastic piece of software.  Thousands of products in production today use BIOS.  It is very well tested and utilized.  It's fairly small footprint and gives a lot of flexibility especially if you use tasks.  If you have multiple things going on in your project (e.g. audio, video, user interface, etc) then you can schedule your code much more effectively if you make use of tasks, semaphores, and hardware interrupts (and software interrupts).  I highly recommend it.

    Brad

  • 0 in reply to Brad Griffis
    Prodigy 70 points

    In the code posted by the OP, the macro VEC_ENTRY is used for the RESET interrupt.  So I believe that the very first instruction executed after reset is "STW   B0,*--B15", which writes to the address in B15.  But B15 is not initialized because the C runtime code hasn't executed yet.  Is some random address being written to?  Seems like a bad idea to me.

    TIA,  Barry

     

    _vectors:
    _vector0:   VEC_ENTRY _c_int00    ;RESET

  • 0 in reply to Barry Brown
    TI__Guru*** 125430 points

    A reset will cause the device to reboot.  In the case of 6713 with EMIF boot (most common usage) that would entail 1k bytes being copied from CS1 to address 0x0 and execution beginning at address 0x0.

  • 0 in reply to Brad Griffis
    Prodigy 70 points

    Yes, I understand that.  And so I claim that (in the program listed by the OP) the first instruction executed will be a store to *--B15, and B15 is not yet initialized.  My point is that using the macro VEC_ENTRY for the RESET could be very bad.  Agreed?

    Barry

  • 0 in reply to Barry Brown
    TI__Guru*** 125430 points

    I disagree with you because that vector will never get executed.  When the reset occurs that will get thrown away.

  • 0 in reply to Brad Griffis
    Prodigy 70 points

    Hmmm...  Sorry, I don't understand.  What gets thrown away when the reset occurs?  You mean the instruction at address 0 is not executed after reset?  Sorry if I'm dense, but I'm actually a hardware designer.  I am trying to track down an intermittent startup problem, and we are using this very same code in our vectors.asm file.

    Barry

  • 0 in reply to Barry Brown
    TI__Guru*** 125430 points

    What device and what bootmode?

  • 0 in reply to Brad Griffis
    Prodigy 70 points

    C6713B

    Boot from external ROM 32 bit.  (Bootmode pins are "11")

  • 0 in reply to Barry Brown
    TI__Guru*** 125430 points

    When a reset occurs the device does not simply execute the reset vector.  Consider power-up -- nothing would be present in the RAM!  So at power-up and any other time the device is reset, the device copies the first 1k bytes of flash to address 0 of the DSP.  This typically contains a secondary bootloader which then copies the application to its proper area of RAM.  So unlike an interrupt, the reset will cause the device to "start over" which entails reloading the application, reinitializing the vector table, etc.

  • 0 in reply to Brad Griffis
    Prodigy 70 points

    Yes I agree.  But besides the secondary loader, that 1k block which is copied also contains the interrupt table starting at address 0, does it not?  The interrupt table has to get there somehow, and I don't think you can have the secondary loader over-writing itself with the table.

  • 0 in reply to Barry Brown
    TI__Guru*** 125430 points

    The vector table can go anywhere in memory as long as it's aligned to 1 KB boundary (least sig 10 bits of address 0).  The bootloader copies it to its location and then some time before interrupts are enabled the ISTP register is initialized to point to that location.

  • 0 in reply to Brad Griffis
    Prodigy 70 points

    Yeah, that's true also.  So in that case you can just put all NOPs in the reset vector, because it will never be executed.  OK, I'm convinced.

    BUT...  If someone (like my coworkers) did put the vector table at address 0 of the 1k boot block code, and they did use that VEC_ENTRY macro, then it would place the instruction "STW   B0,*--B15" at address 0, so it would be writing to the address in B15, which is just some random address when reset is released.  Right?

    Thanks,

    Barry

  • 0 in reply to Barry Brown
    TI__Guru*** 125430 points

    Barry Brown said:
    BUT...  If someone (like my coworkers) did put the vector table at address 0 of the 1k boot block code, and they did use that VEC_ENTRY macro, then it would place the instruction "STW   B0,*--B15" at address 0, so it would be writing to the address in B15, which is just some random address when reset is released.  Right?

    That's true, but it has nothing to do with it being part of the vector table.  That would simply be due to the fact that it starts executing from address 0 after a reset.  Seems like it would be odd to use 512 of 1024 bytes as the vector table.  Can you fit the rest of the secondary bootloader in the remaining 512 bytes?

    In any case, sounds like you have a firm grasp of the issue now, so I imagine you'll do just fine.  :)