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PROCESSOR-SDK-AM62X: UART Status Register Clearing



We are implementing the UART driver. We referred the uart code from the sdk and implementing the UART driver as per the AUTOSAR standard.

We have a usecase for handling the dynamic length data during reception. That is, the size of the data(number of bytes) to be received is not known before hand.

How to handle this use case? We analyzed and thought of implementing the logic for checking the RX_FIFO_EMPTY_STS bit in ISR2 register.

If all data in the FIFO are read out and if the RXFIFO_EMPTY_STS is set, then we consider the reception is completed and notify via callback function.

The default value of ISR2 register is 0x03. To clear the bit RXFIFO_EMPTY_STS, writing 0x03 should clear the bit right?

But writing 0x3 has no effect on the ISR2 register. Is there any mode to be entered for writing into this register?

Checked in Table 12-333. UART Register Access Mode Overview, For ISR2(with offset 70), ISR2 register seems to be accessible in all modes.

How to clear ISR2 register bits?