Can the interrupt of the mailbox be routed to McU1_0 in the MCU domain?how?
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Hi Tian,
Yes, this is possible. The IPC stack in the TI SDKs already rely on these interrupts work.
What is the background for this question - are you just trying to understand how this works, or trying to write your own driver?
regards
Suman
HI,
My current requirement is that in the SDK 8.5, using the cddipc library in mcusw to communicate with the main domain CPU, but there is no registration interrupt routing in this library, however there is a relevant code in PDK. The relevant source code files are McUsw/mcal/mcal/ipc_barz_hw/src/ipc_mailbox.cto pdk_j721s2_08_05_00_36/packages/drv/drv/ipc/src/ipc/ipc/ipc_mailbox.c, function is ipc_mailboxregister。
And Use sciclient_rmirqset to register mailbox interrupt number,but it reture fail.
So i need a specific implementation code that can capture the interrupt of the mailbox on McU1_0。thanks
The problem has been solved, and 8 of the mailbox can be routed to the MCU domain, reference to softwow-software-dl.ti.com/.../interrupt_cfg.html