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AM623: DDR Swapping Rules

Martin Stelter
Prodigy 40 points

Part Number: AM623
Other Parts Discussed in Thread: AM625

I have found two cinflicting information about DDR swapping rules for AM62:

AM62x DDR Board Design and Layout Guidelines

All signals, including data and address / control, must be routed 1 to 1 from the DDR controller to the LPDDR4 memory. Byte swapping across channels or within a channel is not allowed. Similarly, data bit swapping across byte lanes or within a byte is also not allowed.

 

AM625/AM623 Schematic Design and Review Checklist

During the design in case bit swapping is required,bit swaps within a data byte, and swapping of byte 0/1 are supported. Address bit swapping is not supported.

What is true?

  • 0
    TI__Guru* 93151 points

    Apologize for the confusion, the AM62x DDR Board Guidelines app note is in the process of getting updated.  DQ/DM bits within a byte are allowed to be swizzled, and whole bytes within a channel (DQ, DM and DQS together) are allowed to be swapped.   Address bit swizzle is not supported.

    Regards,

    James