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AM3358: Unable to boot the custom board

Part Number: AM3358

Hello Team,

We have designed a custom board with the AM3358BZCZ100 processor. The hardware pinout and configuration for EMMC, uSD, and boot settings are the same as the BeagleBone Black. However, we have changed the DDR memory from MT41K256M16 to IS4346TR16512B.

Currently, we are attempting to boot the board from the SD card, but we are seeing "CCCCC" on the debug console. we are unable to see any other u-boot logs on the console even after waiting for 10mins.

Is DDR IS4346TR16512B is supported for am335x , if yes, Kindly let me know what all configuration changes need to be done in u-boot with reference to DDR change.

Thanks & Regards,

Kasturi.

  • You will need to generate a new configuration file for your DDR device.  Please refer to https://www.ti.com/lit/pdf/sprack4

    I you have only one device, you should not need to perform the software leveling that is described, but you will need to use the spreadsheet in the appnote to generate the correct DDR configuration.

    Regards,

    James

  • Hi James,

    We have configured EMIF tool(spreedsheet), attached for your reference.

    81771.AM335x_EMIF_Configuration_Tool_v3.xlsx

    Also, we have enabled "early debug UART," and we observed that the flow goes from early_board_init() to the sdram_init() function. However, after this point, the SPL (Secondary Program Loader) hangs, and we do not see any further logs.

    We suspect that the DDR configuration is not set correctly. We have attached the configuration spreadsheet for your reference. Kindly review the spreadsheet and let us know if there are any missing or incorrect settings.

    DDR datasheet : https://www.issi.com/WW/pdf/43-46TR16512B-81024BL.pdf 

    Thanks,

    Kasturi.

  • I don't see any major issues in the configuration.  Do you have JTAG access to your board?  This can help pinpoint the problem.  

    If you do, one thing to check is the ensure the register values from the tool got properly written to the EMIF controller.  You can also use the GEL files to attempt to run the DDR initialization standalone to see if the configuration is correct.

    Regards,

    James

  • Hello James,

    We do not currently have JTAG support. We attempted to print the RAM size after configuration, and we were able to observe a RAM size of 4. Below is the boot log.

    CCCCCCCC<debug_uart>

    start of sdram_init function
    inside (board_is_pb || board_is_bone_lt) condition
    end of sdram_init function
    gd->ramsize =4
    board_init_f function

    We flashed the same image on the BeagleBone Black EVK. U-Boot successfully boots (gd-ramsize = 536870912), but we encounter a kernel panic during the kernel boot process.

    Are there any points to consider from both the hardware and software perspectives?

    Thansks & Regards,
    Kasturi
  • I think the beagle bone has an EEPROM which is being read early in boot for some board information.  Do you have this on your board, or if you don't, have you stripped that out of code?  You can also try debugging SPL using these tips:  https://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components/U-Boot/Apps-SPL-Debug.html

    Regards,

    James

  • Hi James,

    We have re-checked the Hardware schematic and DDR line connections and found an issue (RASn and CASn pins are interchanged i.e RASn of AM3358 is connected to CASn pin of the DDR and vice-versa). And From the Hardware side we can interchange but this is very risky, as the lines are in inner layer of PCB. Can we do something from software side ?

    We are using u-boot version 2020.

    Thanks and Regards,

    Kasturi

  • Kasturi, I'm sorry, there is nothing that can be done to swap these signals internally.  You will have to rework the board.

    Regards,

    James