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TDA4VM-Q1: Boot and application for C66/C7X under Linux

Part Number: TDA4VM-Q1


Hi team,

During the boot process, the DSP and MCU firmware under /lib/firmware is loaded and linked to the corresponding .out file in the /lib/firmware/vision_apps_eaik directory. 

1) Where are the firmware compiled? Is the corresponding file compiled in the vision_apps\platform\j721e\RTOS directory? 

2) Does these firmware start the RTOS? Or just DSP or MCU app applications? If these are app for DSP or MCU only, when did RTOS for DSP or MCU start? 

3) These .out files are executed directly from the Linux command line of the board, but cannot be executed. For example, executing VX_app_RTOS_Linux_C6x_1.out will prompt -sh: ./VX_app_RTOS_Linux_C6x_1.out: Permission denied. The root account is actually logged in and should not be a problem with permissions. How do these load?

4) If the customer want to put their algorithm on DSP for calculation, is it ok to just run it by referring the code of the algorithm to this code right here?

Could you help check this case? Thanks.

Best Regards,

Cherry

  • Hi Cherry,

    Where are the firmware compiled? Is the corresponding file compiled in the vision_apps\platform\j721e\RTOS directory? 

    The firmwares are compiled when we build vision_apps. It could be found in vision_apps/out/J7 directory.

    Does these firmware start the RTOS? Or just DSP or MCU app applications? If these are app for DSP or MCU only, when did RTOS for DSP or MCU start? 

    These MCU/DSP firmwares would start the RTOS and does all the RTOS based initializations like IPC, Memory etc and then would run any applications (if any). These are usually used as targets in the OpenVX framework, where particular nodes would run on these cores.

    These .out files are executed directly from the Linux command line of the board, but cannot be executed. For example, executing VX_app_RTOS_Linux_C6x_1.out will prompt -sh: ./VX_app_RTOS_Linux_C6x_1.out: Permission denied. The root account is actually logged in and should not be a problem with permissions. How do these load?

    This would be based on the boot flow. In SPL boot flow, typically the u-boot would load these firmwares and In SBL boot flow, the SBL would load these firmwares.

    If the customer want to put their algorithm on DSP for calculation, is it ok to just run it by referring the code of the algorithm to this code right here?

    Are they using any OpenVX framework to run their algorithm? Typically, in the SDK, you could find that the algorithms to be run on DSP (like add, subtract etc) are usually in the form of OpenVX nodes and these nodes could run on the core.

    Regards,

    Nikhil

  • Hi Nikhil,

    Thank you for the support.

    The firmwares are compiled when we build vision_apps. It could be found in vision_apps/out/J7 directory.

    Under vision_apps/out/J7 is the compiled firmware, the customer would like to know where the source code for the firmware is? 

    These are usually used as targets in the OpenVX framework, where particular nodes would run on these cores.

    Could you help elaborate more on what is particular nodes referring to?

    Thanks and regards,

    Cherry

  • Hi Cherry,

    Under vision_apps/out/J7 is the compiled firmware, the customer would like to know where the source code for the firmware is? 

    The source code could be found in ${PSDKRA}/vision_apps/platform/j721e/rtos/${CORE}/main.c where ${CORE} = mcu1_x, mcu2_x, C7x_1, c66_x etc.

    Could you help elaborate more on what is particular nodes referring to?

    I'm referring to the OpenVX nodes here. Standard OpenVX nodes such as add, subtract etc would run on DSP as their target (i.e., the application would run on A72 but the DSP operations (add, sub etc..) would happen on the DSP core.

    On C7x, we use the TIDL node in order to run the DL algorithms. We have many SDK demos that the customer could refer to, which is available in vision_apps/apps/dl_demos

    Regards,

    Nikhil

  • Hello Nikhil,

    I'm referring to the OpenVX nodes here. Standard OpenVX nodes such as add, subtract etc would run on DSP as their target (i.e., the application would run on A72 but the DSP operations (add, sub etc..) would happen on the DSP core.

    The customer are still confused about the relationship between firmware and openvx node for C66,C7X under lib/firmware/. Will their own algorithms be implemented on the firmware or on the OpenVX node? How do these firmware interact with a node or A72?

    Also, OpenVX should be some algorithms for image processing, right?  The customer's project is preparing algorithms for data acquired by the ADC. so they cannot use OpenVX or TIDL?

    Thanks and regards,

    Cherry

  • Hi Cherry,

    To make it simple, if customer is not using OpenVX framework and just want to implement their algorithm on C66/ C7x, they could add a task onto the main.c of the respective core (i.e, ${PSDKRA}/vision_apps/platform/j721e/rtos/${CORE}/main.c). 

    Is this the usecase which customer is looking for?

    What I meant by OpenVX framework was that the same implementation could be added as a node and run on C66/ C7x as target. The advantage here would be that there would be a pre-defined framework that could do buffer allocation, buffer transfers between the cores.

    If the customer is not looking for such a usecase where they could allocate the buffer themselves and does not require transfer data to another core or already have a mechanism to do it, then they need not use OpenVX.

    Regards,

    Nikhil

  • Hi Nikhil,

    To make it simple, if customer is not using OpenVX framework and just want to implement their algorithm on C66/ C7x, they could add a task onto the main.c of the respective core (i.e, ${PSDKRA}/vision_apps/platform/j721e/rtos/${CORE}/main.c). 

    That is, if data needs to be passed between cores, it is passed through IPC, and OpenVX is based on shared memory buffers between cores. Data can be passed through a memory buffer instead of an IPC. So would OpenVX be more efficient? 

    Is there a demo available in openVX that implements some kind of algorithm and transfers data between the DSP and A72? 

    Thanks and regards,

    Cherry

  • Hi Cherry,

    That is, if data needs to be passed between cores, it is passed through IPC, and OpenVX is based on shared memory buffers between cores. Data can be passed through a memory buffer instead of an IPC. So would OpenVX be more efficient

    Yes, OpenVX would be more efficient in case the data has to shared between cores as the framework itself would take care of this.

    Is there a demo available in openVX that implements some kind of algorithm and transfers data between the DSP and A72?

    You could refer the tutorials available in ${PSDKRA}/tiovx/tutorials.

    For eg, ${PSDKRA}/tiovx/tutorial/ch02_image/vx_tutorial_image_color_convert.c, the vxColorConvertNode and vxChannelExtractNode are algorithms running on C66x which would convert the image format and extract the channel of an image respectively.

    However, the memory allocation of the image is happening in A72 in the shared memory region and these allocated images are used in C66x.

    Similarly, user could create their own kernel that implements their algorithm as explained in the link below

    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tiovx/docs/user_guide/TIOVX_TARGET_KERNEL.html

    Regards,

    Nikhil