• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 98 subscribers
  • Views 717 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM625: DDR refresh rate

JaeWook Kim
Intellectual 370 points
Part Number: AM625

Dear TI experts,

HW : AM6254 Custom HW

SW : Processor SDK 8.5

The LPDDR 4Gb is used in custom HW. The data sheet of memory describes the refresh rate as follows.

"The refresh rate for each MR4 OP[2:0] setting applies to tREFI, tREFIpb and tREFW.
OP[2:0]=011 corresponds to a device temperature of 85c.
Other values require either a longer(2x, 4x)refresh interval at lower temperatures or a shorter(0.5x, 0.25x) refresh interval at higher temperature.
If OP[2]=1, the device temerature is greater than 85c"

Can you let me know how to read the value of tREFI, tREFIpb, tREFW and refresh rate?

Thanks & Regards,

Jaewook

  • 0
    TI__Guru* 85910 points

    Jaewook,

    tREFI is represented in register  (addr 0xF308134) CTL_77[19:0] in Controller clock cycles (1/2 memory clock frequency)

    tREFIpb is represented in register (addr 0xF308150) CTL_84[19:0] in Controller clock cycles (1/2 memory clock frequency)

    There is no representation of tREFW in the controller

    Regards,

    James