PROCESSOR-SDK-J721E: J721EXSOMG01EVM

Hello,

For the J721 device I have seen the debug and onchip trace functions working with CCS and the XDS560-STM and the XDS560-PRO.  The offchip/external STM trace for the XDS560-SDM will NOT work with the J721 device as the HW formatting used by it is NOT supported by the 560-STMs receiver logic current firmware.   The XDS560-PROs offchip/external processor trace was tested with the J721 device (ARMs and DSPs).

I am familiar with the external trace function as I've used it at points in time on the J721-EVM with CCS (initially) and TRACE32 (recently).  The external trace signals TRC+xyz route to the MIPI-60 through an hardware-FET-MUX.  A board dip switch needs to be setup properly to route the trace signals to header.  That DIP switch fixes the startup state of the MUX.  The MUX also can be controlled at run time via an I2C gpio expander.  The default TI-SDK software is such that the I2C-gpio expander is configured to point the MUX at an expansion board route instead of for TRACE.

Given the above, I found for early use of external trace, use of no-boot mode to init the j721 chip + the evm dip switch setting + script to set padconf would result in working trace.  For later use with a fully booted system running HLOS + RTOS, the software owning the GPIO-expander needed to be changed to allow external trace to work.  In the Linux system case, a DTB change was needed.  The method required to control the GPIO expander will vary depending on the SW in use (type and version).

Nothing special is needed to connect and do basic debug over the MIPI-60 as the JTAG signals will route based on the header being plugged in.   As a base line, if you cannot connect and do basic debug you have other issues to look into first before considering external trace.   For external trace to work, the board dip switch needs handling, SW may need handling to set the i2c expander default, and the addition of a padconf script is needed. I do not have an XDS560-PRO so am not sure of any possible tool version configuration requirements, however, at a HW and board level it is known to have worked following the design capabilities. 

Hi Richard,

The dip switch to enable trace on the EVM is enabled: SW3.2 is ON. 

We are also able to connect to the Processor on CCS vis XDS560v2 Trace Pro. And the EVM is set to No boot mode. 

After connection we have been able to change the pad config with a Gel file as described in your trace32 script and the gel file runs successfully as shown below:  

When trying to start PC Trace it still doesn’t work.  

For A72 it doesn’t even show up on CCS:  

On the R5F it does show up as you can see below but when we click on it nothing happens:  

We do not know what we should do in addition to make this work.  

Do you have any additional recommendations? Has this ever been tested with CCS for J721?  

Hello Kamel,

What you have outlined looks good. What version of CCS are you trying with? The version I would have seen it working with was from several years back. I do not have a protace box to try with.   External trace support with ProTrace for later TDA4 family SOCs (like J784S4) is not included in CCS however J721E should still be there.  For later CPUs the recommendation is to use TRACE32 for off chip trace. On chip trace should work. 

Hello Richard,

we are using the CCS:   Version: 12.3.0.00005

also internal on chip trace from CCS is not working. We understand from your post that TRACE32 is recommended for off chip tracing and no longer the traditional XDS560 emulators.

Do you know which CCS version we should try?  

Best regards,

Wajdi Darmoul