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AM3352: U-Boot not booting from NAND

Ayrton Leyssens
Prodigy 191 points
Part Number: AM3352

Hi

I am in the progress of updating our U-Boot from 2021 to 2023.04 version.
In the old version I was able to boot from NAND flash, for some reason this does not seem to work anymore.

I can see the SPL loading U-Boot from NAND, but that is all... no further booting.


U-Boot SPL 2023.04 (Jun 13 2023 - 14:37:54 +0200)
Trying to boot from NAND
Loading U-Boot from 0x00080000 (size 0x00100000) to 0x80800000

Using the old SPL, I am able to boot the 2023.04 U-Boot version (U-Boot proper).
I suspect something is wrong in the config.
We use a NAND with BCH8 HW.

The current config can be found below.

CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_STATIC_MACH_TYPE=y
CONFIG_MACH_TYPE=8888
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="mu_dtb"
CONFIG_AM33XX=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_TARGET_MY_TARGETP=y
CONFIG_SPL_SERIAL=y
CONFIG_SYS_MONITOR_LEN=0x40000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x300000
CONFIG_ENV_RANGE=0x80000
# CONFIG_SPL_FS_FAT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="setenv autoload no; "
CONFIG_LOGLEVEL=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_SPL_MAX_SIZE=0x1b400
CONFIG_SPL_PAD_TO=0x0
CONFIG_SPL_SHOW_ERRORS=y
CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_RAW_ONLY=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_POWER=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_CBSIZE=512
CONFIG_SYS_PBSIZE=1040
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_INFO=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPT is not set
CONFIG_CMD_MISC=y
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.file-system)"
CONFIG_CMD_UBI=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_USE_GATEWAYIP=y
CONFIG_GATEWAYIP="10.124.16.1"
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="0.0.0.0"
CONFIG_USE_NETMASK=y
CONFIG_NETMASK="255.255.254.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="10.35.10.14"
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_CLK=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
# CONFIG_SPL_MISC is not set
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW=y
CONFIG_DM_MTD=y
# CONFIG_NAND_OMAP_GPMC_PREFETCH is not set
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x20
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
# CONFIG_SYS_NAND_5_ADDR_CYCLE is not set
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x180000
CONFIG_PHY_TI=y
CONFIG_PHY_ETHERNET_ID=y
CONFIG_PHY_FIXED=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
CONFIG_PHY=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SPI_MEM=y
CONFIG_OMAP3_SPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_RSA=y
# CONFIG_OF_LIBFDT_OVERLAY is not set
CONFIG_LMB_MAX_REGIONS=8

  • 0
    TI__Expert 8480 points

    Hi,

    Please allow some time to look into this issue.

    ~ Judith

  • 0 in reply to Judith Mendez
    Prodigy 191 points

    Hi Judith

    Of course, no problem.
    I did some modifcications in the meanwhile and it looks like it is stuck in the ECC calculation.
    In omap_gpmc.c (static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc)), certain data bytes got to the 'not_ecc_match' part and fall through to 'not_erased'.

    The NAND was written using the proper U-Boot (same image, but booted from UART instead of NAND).

    If you need any more informtion, please let me know.

    Thanks


  • 0 in reply to Ayrton Leyssens
    TI__Expert 8480 points

    Hi Ayrton,

    Questions:

    1. Is this custom board with different NAND device?

    3. Can you verify your board boots with SYSBOOT[9]=1?

    3. Can you provide the datasheet for your NAND device?

    4. What is your IO voltage?

    5. Can you check the trace vectors? TRM 26.1.14 has more info. Try Trace vector 3 and bit # 12.


    I see your page size is 2K and OOB size is 64 bytes, it seems like BCH8 might be correct. We need to make sure ECC scheme in U-boot write matches what ROM is expecting. If it does not match, ROM will not boot from NAND device. Just as an experiment, could you try BCH16 and BCH4?


    ~ Judith

  • 0 in reply to Judith Mendez
    Prodigy 191 points

    Hi Judith

    1 & 3. Yes, it is an mt29f4g08abbdah4 ( https://www.mouser.be/datasheet/2/671/micron_technology_micts06228-1-1759217.pdf )

    2. SYSBOOT[9] is 1 (but we can change the bootorder so UART comes first when runiing for the first time)

    4.That is something I have to check with the electronics eng. (although I don't suspect an issue here since a prvious version of the U-Boot SPL worked)

    5. I will check them an post an update below. Today I will be unable to check this (first thing tomorrow morning, 8AM CET)

    If I try BCH16, U-Boot "complains" about the size of the ECCBYTES (CONFIG_SYS_NAND_ECCBYTES = 14).
    I will check on BCH4.

    Thanks

  • 0 in reply to Ayrton Leyssens
    TI__Expert 8480 points

    Hi,

    SYSBOOT[9] according to TRM Table 26-7 is for ECC check to be done by ROM or NAND device.

    - SYSBOOT[9] = 0 = ECC done by ROM
    or
    - SYSBOOT[9] = 1 = ECC handled by NAND

    If you had SYSBOOT[9] = 1 that means NAND device will take care off ECC check. Is this the behavior you are looking for?

    Also, based on:
    "Using the old SPL, I am able to boot the 2023.04 U-Boot version (U-Boot proper)."

    I assume the same board was boot tested with a working image, using old tiboot3.bin?

    Also what is your boot sequence as per Table 26-7 in: www.ti.com/.../spruh73q.pdf.

    ~ Judith

  • 0 in reply to Judith Mendez
    Prodigy 191 points

    Hi Judith
    SYSBOOT[9] is apparently pulled down. (my bad)
    The ROM should handle the ECC check.

    The same board was indeed tested with a working image (U-Boot 2021.07-rc4), so I know HW wise, it should do some stuff.
    SW wise I seem to have something wrong in the configuration of U-Boot.

    Boot sequence is NAND - NAND I2C - USB0 - UART0 (SYSBOOT[4] is pulled up)

  • 0 in reply to Ayrton Leyssens
    TI__Expert 8480 points

    Hi Ayrton,

    Understood, then can you verify the board boots with: SYSBOOT[9]=1?

    This will prove that your images work, and there is an issue with ECC scheme. We need to make sure ECC scheme in U-boot write matches what ROM is expecting. If it does not match, ROM will not boot from NAND device. 

    ~ Judith