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C6747 BIOS (v5.33.01) interrupt service table issue

Michael Martin79873
Prodigy 20 points

Hello,

 

I am currently working to integrate two programs that were given to me for the C6747.  One of these used BIOS for ECM-controlled interrupts for an audio processing routine, and one did not use BIOS, with UART2, non-ECM-controlled interrupts.  Because of their separate creation, they have separate interrupt service tables.  I attempted to migrate the non-BIOS interrupt (event 69) to the BIOS tcf, but could not get this implementation to work, as the UART interrupt never executed.  My second idea was to attempt to move the vectors from the BIOS interrupt service table into the IST that the program itself created, but could not get this approach to work either.  For reference, the code which I attempted to implement is shown below.  Am I misunderstanding how BIOS maps interrupts?  If so, what would you suggest?

Here is my interrupt table assembly code, after attempting to integrate the BIOS interrupts.

 

; Global symbols defined here

.global _intcVectorTable

.global _c_int00

.global _UART2_isr

.global hwi7

.global hwi8

.global hwi9

.global hwi10

; .global _ECM_dispatch

 

;******************************************************************************

;* VEC_ENTRY: Macro that instantiates one entry in the interrupt service table.

;******************************************************************************

VEC_ENTRY .macro addr

STW   B0,*--B15

MVKL  addr,B0

MVKH  addr,B0

B     B0

LDW   *B15++,B0

NOP   2

NOP

NOP

.endm

 

;******************************************************************************

;* vec_dummy: Dummy interrupt service routine used to initialize the IST.

;******************************************************************************

_vec_dummy:

B    B3

NOP  5

 

;***************************************************************************************

;* Map interrupt service table (IST) to corresponding interrupt service routines (ISR)

;***************************************************************************************

 .sect ".vecs"

 .align 1024

 

_intcVectorTable:

_vector0: VEC_ENTRY _c_int00 ;RESET

_vector1: VEC_ENTRY _vec_dummy ;NMI

_vector2: VEC_ENTRY _vec_dummy ;RSVD

_vector3: VEC_ENTRY _vec_dummy ;RSVD

_vector4: VEC_ENTRY _UART2_isr ;DSP Maskable INT4 : Mapped to func 'UART2_isr'

_vector5: VEC_ENTRY _vec_dummy ;DSP Maskable INT5 : Empty

_vector6: VEC_ENTRY _vec_dummy ;DSP Maskable INT6 : Empty

_vector7: VEC_ENTRY hwi7 ;DSP Maskable INT7 ; THESE FOUR INTERRUPTS WERE THE FOUR BIOS CREATED, WHICH I ATTEMPTED TO INTEGRATE HERE

_vector8: VEC_ENTRY hwi8 ;DSP Maskable INT8 ; 

_vector9: VEC_ENTRY hwi9 ;DSP Maskable INT9 ;

_vector10: VEC_ENTRY hwi10 ;DSP Maskable INT10 ;

_vector11: VEC_ENTRY _vec_dummy ;DSP Maskable INT11: Empty

_vector12: VEC_ENTRY _vec_dummy ;DSP Maskable INT12: Empty

_vector13: VEC_ENTRY _vec_dummy ;DSP Maskable INT13: Empty

_vector14: VEC_ENTRY _vec_dummy ;DSP Maskable INT14: Empty

_vector15: VEC_ENTRY _vec_dummy ;DSP Maskable INT15: Empty

 

 

Whether I am on the right track or this is the completely wrong approach, any help would be greatly appreciated.

 

Thanks,

-Michael

  • 0
    TI__Mastermind 18260 points

    Michael Martin79873 said:

    _vec_dummy:

    B    B3

    NOP  5

    The above code is not a good dummy vector.  B3 is the function return address register, if you want to do a straight return from an interrupt you need to use:
        B   IRP
        NOP 5

    But why do you want dummy interrupts at all?  If an unexpected interrupt fires (which it shouldn't because you have control of the IER), wouldn't you want to know about it instead of having it just be silently serviced?  BIOS places "spin" vectors in unused interrupts, which "park" the CPU there so that you know it happened.

    While it is a hack, I would expect your "vector table branching to BIOS vector" approach to work.  You have one vector that is not branching to the BIOS vector, and need to be careful what you do in that ISR, since combining non-BIOS ISRs w/ BIOS dispatcher-based ISRs can be problematic.  Your non-BIOS ISR should not re-enable interrupts and not make any BIOS calls (which seems obvious for a non-BIOS ISR, since it's not BIOS-based).

    But I would recommend porting the non-BIOS code into BIOS code.  You don't say what the problem was with that approach, but I suspect it relates to your non-BIOS ISR: UART2_isr.  You say that it maps to event 69, so you would need to map event 69 to vector 4 in the INTMUX1 register, and there is BIOS support for doing that.  There's no need to use ECM here, since you appear to have plenty of vectors to handle your interrupt servicing needs.

    Regards,

    - Rob

  • 0 in reply to Robert Tivy
    Prodigy 20 points

    Hi Rob,

     

    Thanks for your quick response.  I followed your recommendation and re-implemented the interrupt in BIOS.  As you suspected, the BIOS issue was with my non-BIOS ISR, and it was in fact because the event was not being mapped in the INTMUX1 register.  I wrote my own code to do that mapping, and the integrated code now works!

     

    Thank you for your help.

     

    Regards,

    -Michael