AM625: U-Boot and Linux Changes for 512MB LPDDR4

Stuart Baker

Part Number: AM625
Other Parts Discussed in Thread: DP83620

I'm working with a customer that is trying to boot Linux on their custom board, from eMMC FLASH, with 512MB of LPDDR4 memory. So far, they have been able to successfully boot all the way to the U-Boot running from DDR on the A53 core. They have also been able to format the rootfs of eMMC FLASH and copy their Linux file system over (same Linux file system as the out-of-box SDK for now). Therefore, they believe that their eMMC and DDR configurations are correct. They have also patched /rootfs/boot with their custom Image and Device Tree Blob.

SDK version 08.06.00.42 (Release date: 24 Feb 2023).

However, when they try to boot the kernel, they get a "starting kernel" print on the serial port, but nothing more.

They have validated their process on AM62 starter kit, and their eMMC boot process is working on the kit. There is a hypothesis that there are some DDR configuration steps missing for the smaller 512MB DDR size.

Following the AM62x Linux Academy porting guide, DDR changes are suggested here, which they have followed. The porting guide does not recommend any other changes either for U-Boot or Linux, and this seems a bit suspicious to me.

In particular, what about the following potential (undocumented) Linux change:

arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
- memory@80000000: Change the size to 0x20000000
- reserved-memory: Do any of these memory locations need to change?

Are there any other changes necessary to move to 512MB of DDR?

Thanks,

Stuart

over 2 years ago

+1 Judith Mendez over 2 years ago

TI__Expert 8480 points

Hi Stuart,

As you mentioned, the customer should follow the following:

1.
Follow the steps outlined in the DDR Board Design and Layout Guidelines. This application report also includes useful DDR bringup information.
To facilitate software configuration of the DDRSS, use the DDR Subsystem Configuration Tool in SysConfig to generate DDR configuration device tree files. For example,
- u-boot/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi: AM62x SK DDR4 configuration.
When the DDR timings and parameters are setup correctly, U-Boot will automatically detect, verify, and configure the size of DDR during runtime in the architectural files by using get_ram_size().

2.
Then carry out the following changes in DTS:

ti-uboot:

diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi
index e67ddebccf..c9b61e2a32 100644
--- a/arch/arm/dts/k3-am62x-sk-common.dtsi
+++ b/arch/arm/dts/k3-am62x-sk-common.dtsi
@@ -31,7 +31,7 @@
                memory@80000000 {
                                device_type = "memory";
                                /* 2G RAM */
-               reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+               reg = <0x00000000 0x80000000 0x00000000 0x20000000>;

                };

ti-linux:

diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
index 3e7204440fa0..7e91c2035d31 100644
--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
@@ -25,8 +25,8 @@
 
        memory@80000000 {
                device_type = "memory";
-               /* 2G RAM */
-               reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+               /* 512MB RAM */
+               reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
 
        };

~ Judith

0 Stuart Baker over 2 years ago in reply to Judith Mendez

TI__Genius 10620 points

Judith,

Thank you, this confirms my assumptions. I think the Linux DTS change may be missing from our AM62x Linux Academy, unless I've missed it.

Thanks,

Stuart

0 Murali Chikkanna over 2 years ago in reply to Stuart Baker

Prodigy 145 points

Hi judith,

Thank you, we can able to boot Linux now on the Custom Board.

We are testing Ethernet PHY on the Custom Board.The Ethernet PHY used is DP83620.The changes made on the u-boot source code(u-boot-2021.01+gitAUTOINC+3983bffabc-g3983bffabc) to bring up the Ethernet PHY is mentioned below.

1) Device tree File Changes:
--------------------------
main_rmii2_pins_default: main-rmii2-pins-default{
pinctrl-single,pins = <
AM62X_IOPAD(0x0168, PIN_INPUT, 1) /* (AE21) RGMII2_TXC.RMII2_CRS_DV */
AM62X_IOPAD(0x0180, PIN_INPUT, 1) /* (AD23) RGMII2_RXC.RMII2_REF_CLK */
AM62X_IOPAD(0x0184, PIN_INPUT, 1) /* (AE23) RGMII2_RD0.RMII2_RXD0 */
AM62X_IOPAD(0x0188, PIN_INPUT, 1) /* (AB20) RGMII2_RD1.RMII2_RXD1 */
AM62X_IOPAD(0x017c, PIN_INPUT, 1) /* (AD22) RGMII2_RX_CTL.RMII2_RX_ER */
AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */
AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */
AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */
>;
};

main_rmii1_pins_default: main-rmii1-pins-default{
pinctrl-single,pins = <
AM62X_IOPAD(0x0130, PIN_INPUT, 1) /* (AE19) RGMII1_TXC.RMII1_CRS_DV */
AM62X_IOPAD(0x0148, PIN_INPUT, 1) /* (AD17) RGMII1_RXC.RMII1_REF_CLK */
AM62X_IOPAD(0x014c, PIN_INPUT, 1) /* (AB17) RGMII1_RD0.RMII1_RXD0 */
AM62X_IOPAD(0x0150, PIN_INPUT, 1) /* (AC17) RGMII1_RD1.RMII1_RXD1 */
AM62X_IOPAD(0x0144, PIN_INPUT, 1) /* (AE17) RGMII1_RX_CTL.RMII1_RX_ER */
AM62X_IOPAD(0x0134, PIN_INPUT, 1) /* (AE20) RGMII1_TD0.RMII1_TXD0 */
AM62X_IOPAD(0x0138, PIN_INPUT, 1) /* (AD20) RGMII1_TD1.RMII1_TXD1 */
AM62X_IOPAD(0x012c, PIN_INPUT, 1) /* (AD19) RGMII1_TX_CTL.RMII1_TX_EN */
>;
};

&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default
&main_rmii1_pins_default
&main_rmii2_pins_default>;
};

&cpsw_port1 {
phy-mode = "rmii";
phy-handle = <&cpsw3g_phy0>;
};

&cpsw3g_mdio{
cpsw3g_phy0: ethernet-phy@3 {
reg = <0x03>;
};

};

&cpsw_port2 {

phy-mode = "rmii";
phy-handle = <&cpsw3g_phy1>;
};

&cpsw3g_mdio {
cpsw3g_phy1: ethernet-phy@5 {
reg = <0x05>;

};
};

2. Config file

am62x_evm_a53_defconfig
-----------------------

CONFIG_PHY_TI_GENERIC=y

3. Driver File:
----------
drivers/net/phy/ti_init_phy.c

#ifdef CONFIG_PHY_TI_GENERIC
static struct phy_driver dp83620_driver = {
.name = "TI DP83620",
//.uid = 0x20005ce0,
.uid = 0x20005ce1,
.mask = 0xfffffff0,
.features = PHY_BASIC_FEATURES,
.config = &genphy_config_aneg,
.startup = &genphy_startup,
.shutdown = &genphy_shutdown,

};
#endif

#ifdef CONFIG_PHY_TI_GENERIC

phy_register(&dp83620_driver);

#endif

After these changes, We are seeing the LED's on the RJ45 Connector and can able to read the PHY register's using MII commands on U-boot. The MII dump for the status register is shown below.