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Resource assignment from DM816x/AM389x kernel does not match (or is incomplete) compared to that done by Linux PC when Altera PCIe boad is plugged in

Etienne Lorrain
Prodigy 200 points

Hi Hemant,

I have a working PCIe card (official and unmodified Stratix IV development kit configured with the file hip_s4gx_gen2_x1/top.sof from https://www.altera.com/support/software/download/refdesigns/ip/interface/dnl-pciexpress-hp.jsp ) which does DMA backward and forward using the Altera PCIe endpoint and the altpciechdma.ko module.

All that works correctly on a PC, I have few "lspci -vv" if you need them.

That Altera PCIe card is configured as PCIe x1, but the connector is a PCIe x8, so I am using an adapter to connect to the Spectrum Digital 816x/389x EVM board.

That adapter has been done by the hardware department, being a software guy I assume it should not cause problem.

I have no real problem booting Linux with this card plugged-in, so from now on I keep PCIe RST ON (towards R195).

When I am booting the official Linux from the provided SD card (kernel 2.6.37), I get obviously wrong results - and as I said we are not planning to use that distribution.

I am redoing the test with that official kernel right now - first boot did not detect any PCIe card, redoing:

reading uImage

2362144 bytes read
## Booting kernel from Legacy Image at 80009000 ...
   Image Name:   Arago/2.6.37-psp04.00.00.10/dm81
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2362080 Bytes = 2.3 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.37 (x0029463@swubn01) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #1 Wed Jun 1 12:18:59 IST 2011
...

pm_dbg_init: only OMAP3 supported
Registered ti81xx_fb device
ti816x_pcie: Invoking PCI BIOS...
ti816x_pcie: Setting up Host Controller...
ti816x_pcie: Register base mapped @0xd0820000
ti816x_pcie: Starting PCI scan...
pci 0000:00:00.0: [104c:8888] type 1 class 0x000604
pci 0000:00:00.0: rpm_resume flags 0x0
pci 0000:00:00.0: rpm_resume returns -11
PCI: bus0: Fast back to back transfers disabled
pci 0000:01:00.0: [1172:e001] type 0 class 0x00ff00
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x0fffffff]
pci 0000:01:00.0: reg 14: [mem 0x00000000-0x0003ffff]
pci 0000:01:00.0: reg 18: [mem 0x00000000-0x0003ffff]
pci 0000:01:00.0: rpm_resume flags 0x0
pci 0000:01:00.0: rpm_resume returns -11
PCI: bus1: Fast back to back transfers disabled
pci 0000:00:00.0: BAR 8: can't assign mem (size 0x18000000)
pci 0000:01:00.0: BAR 0: can't assign mem (size 0x10000000)
pci 0000:01:00.0: BAR 1: can't assign mem (size 0x40000)
pci 0000:01:00.0: BAR 2: can't assign mem (size 0x40000)
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0:   bridge window [io  disabled]
pci 0000:00:00.0:   bridge window [mem disabled]
pci 0000:00:00.0:   bridge window [mem pref disabled]
PCI: enabling device 0000:00:00.0 (0140 -> 0143)
pci_bus 0000:00: resource 0 [mem 0x20000000-0x2fffffff]
pci_bus 0000:00: resource 1 [io  0x40000000-0x402fffff]
bio: create slab <bio-0> at 0
vgaarb: loaded
...

root@dm816x-evm:~# LD_PRELOAD=/etienne/libpci.so.3 /etienne/lspci -vv -s 01:00.0
01:00.0 Class ff00: Device 1172:e001 (rev 01)
    Subsystem: Device a106:2100
    Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
    Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    Interrupt: pin A routed to IRQ 48
    Capabilities: [50] MSI: Enable- Count=1/4 Maskable- 64bit+
        Address: 0000000000000000  Data: 0000
    Capabilities: [78] Power Management version 3
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
        Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    Capabilities: [80] Express (v2) Endpoint, MSI 00
        DevCap:    MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
            ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
        DevCtl:    Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
            RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
            MaxPayload 128 bytes, MaxReadReq 512 bytes
        DevSta:    CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
        LnkCap:    Port #1, Speed 5GT/s, Width x1, ASPM L0s, Latency L0 unlimited, L1 unlimited
            ClockPM- Surprise- LLActRep- BwNot-
        LnkCtl:    ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
            ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
        LnkSta:    Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        DevCap2: Completion Timeout: Range ABCD, TimeoutDis+
        DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
        LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
             Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
             Compliance De-emphasis: -6dB
        LnkSta2: Current De-emphasis Level: -3.5dB
    Capabilities: [100 v1] Virtual Channel
        Caps:    LPEVC=0 RefClk=100ns PATEntryBits=1
        Arb:    Fixed- WRR32- WRR64- WRR128-
        Ctrl:    ArbSelect=Fixed
        Status:    InProgress-
        VC0:    Caps:    PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
            Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
            Ctrl:    Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
            Status:    NegoPending- InProgress-

root@dm816x-evm:~#

Well, I do not like "        Address: 0000000000000000  Data: 0000" at all, let's use the kernel we are generating in Ericsson:

reading uImage

2217416 bytes read
## Booting kernel from Legacy Image at 80009000 ...
   Image Name:   Linux-2.6.37
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2217352 Bytes = 2.1 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.37 (eetilor@lnxdws033) (gcc version 4.6.0 (GCC) ) #3 Wed Jul 13 12:56:03 BST 2011
...

Registered ti81xx_fb device
ti816x_pcie: Invoking PCI BIOS...
ti816x_pcie: Setting up Host Controller...
ti816x_pcie: Register base mapped @0xca820000
ti816x_pcie: Starting PCI scan...
PCI: bus0: Fast back to back transfers disabled
PCI: bus1: Fast back to back transfers disabled
pci 0000:00:00.0: BAR 8: assigned [mem 0x20000000-0x37ffffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x20000000-0x2fffffff]
pci 0000:01:00.0: BAR 0: set to [mem 0x20000000-0x2fffffff] (PCI address [0x20000000-0x2fffffff])
pci 0000:01:00.0: BAR 1: assigned [mem 0x30000000-0x3003ffff]
pci 0000:01:00.0: BAR 1: set to [mem 0x30000000-0x3003ffff] (PCI address [0x30000000-0x3003ffff])
pci 0000:01:00.0: BAR 2: assigned [mem 0x30040000-0x3007ffff]
pci 0000:01:00.0: BAR 2: set to [mem 0x30040000-0x3007ffff] (PCI address [0x30040000-0x3007ffff])
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0:   bridge window [io  disabled]
pci 0000:00:00.0:   bridge window [mem 0x20000000-0x37ffffff]
pci 0000:00:00.0:   bridge window [mem pref disabled]
PCI: enabling device 0000:00:00.0 (0140 -> 0143)
bio: create slab <bio-0> at 0
SCSI subsystem initialized

...

root:/# /lspci -vv -s 01:00.0
01:00.0 Class ff00: Device 1172:e001 (rev 01)
    Subsystem: Device a106:2100
    Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
    Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    Interrupt: pin A routed to IRQ 48
    Region 0: Memory at 20000000 (32-bit, non-prefetchable) [disabled] [size=256M]
    Region 1: Memory at 30000000 (32-bit, non-prefetchable) [disabled] [size=256K]
    Region 2: Memory at 30040000 (32-bit, non-prefetchable) [disabled] [size=256K]
    Capabilities: [50] MSI: Enable- Count=1/4 Maskable- 64bit+
        Address: 0000000000000000  Data: 0000
    Capabilities: [78] Power Management version 3
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
        Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    Capabilities: [80] Express (v2) Endpoint, MSI 00
        DevCap:    MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
            ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
        DevCtl:    Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
            RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
            MaxPayload 128 bytes, MaxReadReq 512 bytes
        DevSta:    CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
        LnkCap:    Port #1, Speed 5GT/s, Width x1, ASPM L0s, Latency L0 unlimited, L1 unlimited
            ClockPM- Surprise- LLActRep- BwNot-
        LnkCtl:    ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
            ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
        LnkSta:    Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        DevCap2: Completion Timeout: Range ABCD, TimeoutDis+
        DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
        LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
             Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
             Compliance De-emphasis: -6dB
        LnkSta2: Current De-emphasis Level: -6dB
    Capabilities: [100 v1] Virtual Channel
        Caps:    LPEVC=0 RefClk=100ns PATEntryBits=1
        Arb:    Fixed- WRR32- WRR64- WRR128-
        Ctrl:    ArbSelect=Fixed
        Status:    InProgress-
        VC0:    Caps:    PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
            Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
            Ctrl:    Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
            Status:    NegoPending- InProgress-

That state seems a lot more sane, but I have major errors when trying to access this PCIe device:

- if the driver module tries to read some BARx + 0x20 value, it fails (seems hardware failure to me) with:

root:/# insmod /altpciechdma-read.ko
PCI: enabling device 0000:01:00.0 (0140 -> 0142)
Unhandled fault: Precise External Abort on non-linefetch (0x1008) at 0xca88a021
Internal error: : 1008 [#1]
last sysfs file: /sys/devices/pci0000:00/0000:00:00.0/0000:01:00.0/class
Modules linked in: altpciechdma(+)
CPU: 0    Not tainted  (2.6.37 #3)
PC is at probe+0x89c/0xda0 [altpciechdma]
LR is at release_console_sem+0x164/0x1bc
pc : [<bf0009cc>]    lr : [<c0053eb4>]    psr: 60000013
sp : c6e75d10  ip : c6e75c30  fp : c6e75d6c
r10: 00000020  r9 : ffc14000  r8 : ca88a000
r7 : c6c1ec00  r6 : 00000000  r5 : ffc11010  r4 : c6f1c580
r3 : ffffffff  r2 : c0422f4c  r1 : 00000007  r0 : 00000033
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
Control: 10c5387d  Table: 86e5c019  DAC: 00000015
Process insmod (pid: 78, stack limit = 0xc6e742e8)
Stack: (0xc6e75d10 to 0xc6e76000)
5d00:                                     86f06000 c6f1c580 c01b832c c6c1ec68
5d20: c6e75d44 c6e75d30 00000000 ca88a00c ca88a01c c6c1ec60 86f04000 70015d48
5d40: c01f472c c6c1ecf0 c6c1ec60 c6c1ec00 bf000f08 00000000 bf0018f8 bf001928
5d60: c6e75d9c c6e75d70 c01b83c4 bf00013c c01b832c c6c1ec60 c047391c c6c1ec94
5d80: 00000000 bf001928 000002ad 00000000 c6e75dc4 c6e75da0 c01ef93c c01b8338
5da0: 00000000 c6c1ec60 bf001928 c6c1ec94 00000000 00000001 c6e75de4 c6e75dc8
5dc0: c01efadc c01ef8b0 c01efa48 bf001928 00000000 c01efa48 c6e75e0c c6e75de8
5de0: c01eea6c c01efa54 c6c3efb8 c6c5e6b0 c019e8b4 bf001928 c0431f28 c6e9f300
5e00: c6e75e1c c6e75e10 c01ef5fc c01eea14 c6e75e4c c6e75e20 c01ef290 c01ef5e4
5e20: bf001120 c6e75e30 bf001928 bf001928 c0431f28 bf004000 00000001 00000000
5e40: c6e75e74 c6e75e50 c01efc90 c01ef118 bf00195c bf0018f8 bf001928 c0431f28
5e60: bf004000 00000001 c6e75e94 c6e75e78 c01b88c4 c01efc1c c6e74000 c0445b00
5e80: 00000001 bf004000 c6e75ea4 c6e75e98 bf004024 c01b8890 c6e75eec c6e75ea8
5ea0: c002c44c bf00400c 00000002 00000004 c6e75edc c6e75ec0 bf001964 bf001964
5ec0: 00000001 bf001964 bf001964 00000001 c6f1c300 00000001 000002ad 0000001c
5ee0: c6e75fa4 c6e75ef0 c007eb70 c002c324 bf001970 000a1a31 c6e75fac c007d428
5f00: 00000000 ca8a6118 ca8a6114 000a8f5c ca8a604c 00000000 c00b8ec0 ca8a4000
5f20: 0000345d ca8a62d8 ca8a61e7 ca8a71b0 c6e9f300 00001a88 00001b58 00000000
5f40: 00000000 00000018 00000019 00000010 0000000d 0000000b 00000000 00000000
5f60: 00000000 00000000 00000000 00000000 00000000 c03f84b0 00000001 00000000
5f80: 00000069 000a8f5c 00000080 c0031f84 c6e74000 00000000 00000000 c6e75fa8
5fa0: c0031e00 c007e758 00000000 00000069 000c3040 0000345d 000a8f5c 00000000
5fc0: 00000000 00000069 000a8f5c 00000080 bea9ad54 bea9ae4c 000a1a31 000a6a78
5fe0: 000c3008 bea9a9ec 00019560 402508f4 60000010 000c3040 cc3bc793 cc3ac293
Backtrace:
[<bf000130>] (probe+0x0/0xda0 [altpciechdma]) from [<c01b83c4>] (pci_device_probe+0x98/0x11c)
[<c01b832c>] (pci_device_probe+0x0/0x11c) from [<c01ef93c>] (driver_probe_device+0x98/0x1a4)
[<c01ef8a4>] (driver_probe_device+0x0/0x1a4) from [<c01efadc>] (__driver_attach+0x94/0x98)
 r8:00000001 r7:00000000 r6:c6c1ec94 r5:bf001928 r4:c6c1ec60
r3:00000000
[<c01efa48>] (__driver_attach+0x0/0x98) from [<c01eea6c>] (bus_for_each_dev+0x64/0x90)
 r6:c01efa48 r5:00000000 r4:bf001928 r3:c01efa48
[<c01eea08>] (bus_for_each_dev+0x0/0x90) from [<c01ef5fc>] (driver_attach+0x24/0x28)
 r6:c6e9f300 r5:c0431f28 r4:bf001928
[<c01ef5d8>] (driver_attach+0x0/0x28) from [<c01ef290>] (bus_add_driver+0x184/0x24c)
[<c01ef10c>] (bus_add_driver+0x0/0x24c) from [<c01efc90>] (driver_register+0x80/0x144)
[<c01efc10>] (driver_register+0x0/0x144) from [<c01b88c4>] (__pci_register_driver+0x40/0xb0)
 r8:00000001 r7:bf004000 r6:c0431f28 r5:bf001928 r4:bf0018f8
r3:bf00195c
[<c01b8884>] (__pci_register_driver+0x0/0xb0) from [<bf004024>] (alterapciechdma_init+0x24/0x3c [altpciechdma])
 r7:bf004000 r6:00000001 r5:c0445b00 r4:c6e74000
[<bf004000>] (alterapciechdma_init+0x0/0x3c [altpciechdma]) from [<c002c44c>] (do_one_initcall+0x134/0x19c)
[<c002c318>] (do_one_initcall+0x0/0x19c) from [<c007eb70>] (sys_init_module+0x424/0x1ae4)
[<c007e74c>] (sys_init_module+0x0/0x1ae4) from [<c0031e00>] (ret_fast_syscall+0x0/0x30)
Code: e58dc000 eb4c4f89 e35a0020 1affffdd (e5d80021)
---[ end trace 567a0e9800263fd4 ]---
Segmentation fault

- if the driver module set DMA to be done by the Altera PCIe endpoint, those are never executed (unlike on PC). The problem to see the reason why they are not executed is that the error codes cannot be read due to the previous problem.

If you need source files, I can provide them without any problems - I can even help you set up a system identical to mine if needed.

Obviously I can test here on any thing you want to try. I just need to have PCIe working in between AM389x and Altera Stratix IV.

Regards,

Etienne.

  • 0
    Prodigy 200 points

    Hemant,

    > That Altera PCIe card is configured as PCIe x1, but the connector is a PCIe x8, so I am using an adapter to connect to the Spectrum Digital 816x/389x EVM board.

    I have just checked that this adapter do not create any problem when used to connect my Altera board to a PC, so it is probably not the cause of the problem.

     

    Regards,

    Etienne.

  • 0 in reply to Etienne Lorrain
    Prodigy 200 points

    As an additional test following:

    http://processors.wiki.ti.com/index.php/DM816x_C6A816x_AM389x_PCI_Express_Root_Complex_Driver_User_Guide

    I tried to set the MaxReadReq of the PCIe card and the PCIe RC (together or independently) to 256 by:

    root:/# ./setpci -v -s 01:00.0 78.W=0x1000:0x7000
    0000:01:00.0 @78 8001->(1000:7000)->9001
    root:/# ./setpci -v -s 00:00.0 78.W=0x1000:0x7000
    0000:00:00.0 @78 2810->(1000:7000)->1810
    root:/#

    The Altera card do not seem to handle a change of this value, because re-reading lspci -vv give the same:

        Capabilities: [80] Express (v2) Endpoint, MSI 00
            DevCap:    MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
                ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
            DevCtl:    Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                MaxPayload 128 bytes, MaxReadReq 512 bytes

    I have exactly the same external abort when inserting my module, at first read of the mapped BAR address:

    PCI: enabling device 0000:01:00.0 (0140 -> 0142)
    Unhandled fault: Precise External Abort on non-linefetch (0x1008) at 0xca88a021
    Internal error: : 1008 [#1]
    last sysfs file: /sys/devices/pci0000:00/0000:00:00.0/0000:01:00.0/class
    Modules linked in: altpciechdma(+)

    Please give me a name of at least one PCIe card which works on the Spectrum Digital 816x/389x EVM revision E.

    If the PCIe subsystem of the AM389x itself is faulty I need to know as soon as possible.

    Regards,

    Etienne.

  • 0 in reply to Etienne Lorrain
    Prodigy 200 points

    And I forgot to add that I have modified my driver to set the maximum read request at driver initialisation by calling

    pcie_set_readrq(dev, 256)

    and checking that pcie_get_readrq(dev) returns 256 (before the OOPS), which can be checked by a lspci -vv after the kernel OOPS:

        Capabilities: [80] Express (v2) Endpoint, MSI 00
            DevCap:    MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
                ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
            DevCtl:    Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                MaxPayload 128 bytes, MaxReadReq 256 bytes

    Etienne.

  • 0
    TI__Expert 5685 points

    Etienne,

    You mentioned that the pre-built kernel didn't assign any resources to the Aletra card. Did you modify the kernel to be able to assign the BARs (2nd log)?

    In the crash, I see address 0xca88a021 being accessed - which BAR this maps to? And I assume you are doing byte access?

    After the crash, can you try dumping following register using devmem2 utility?

    0x51001728

    The last 5 bits will show the link status, the expected value is 0x11.

       Hemant

     

     

     

     

  • 0 in reply to HemantPedanekar
    Prodigy 200 points

    The "Aletra" card has had its firmware changed to no more report 256 MB window size but 32 MB in the thread at:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/126599.aspx

    The TI processor cannot manage windows > 256 MB even if only 32 KB are mapped.

    I can now read and write all BARs after "pcie_set_readrq(dev, 256)", I was not doing 8 bits access. The PCIe link is fine.

  • 0 in reply to Etienne Lorrain
    TI__Expert 5685 points

    So, the main issue was BAR0 being 256MB - reducing this to 32MB works?

    Or do you still observe crash and need to set readreq = 256?

    Not sure why the abort address was showing 0xca88a021.

    Btw, the setpci command you used earlier needs to be changed as:

    ./setpci -v -s 01:00.0 88.W=0x1000:0x7000

    As the PCIe capabilities on your device are located as offset 0x80 and not 0x70.

       Hemant

     

     

  • 0 in reply to HemantPedanekar
    Prodigy 200 points

    You need both a small BAR0 and set readreq to get something working.

    I do not know why the abort address is odd, it was an aligned address requested when I checked.

    You also need modifications like:

    --- ./arch/arm/mach-omap2/pcie-ti816x.c 2011-08-08 17:18:31.392252162 +0100
    +++ ../linux-2.6.37-orig/arch/arm/mach-omap2/pcie-ti816x.c      2011-07-07 16:20:16.000000000 +0100
    @@ -796,21 +743,14 @@ static int ti816x_pcie_setup(int nr, str
            msi_irq = platform_get_irq_byname(pcie_pdev, "msi_int");
     
            if ((msi_irq >= 0) && msi_irq_num) {
    -               unsigned msi_cpt;
                    if (msi_irq_num > CFG_MAX_MSI_NUM) {
    -                       msi_irq_num = CFG_MAX_MSI_NUM;
    +                       msi_irq_num = max(msi_irq_num, CFG_MAX_MSI_NUM);
                            pr_warning(DRIVER_NAME
                                    ": Restricting MSI count to max supported (%d)",
                                    msi_irq_num);
                    }
    -               for (msi_cpt = 0; msi_cpt < msi_irq_num; msi_cpt++) {
    -                       printk ("MSI IRQ %u\n", msi_cpt + 112);
    -                       set_irq_chip_and_handler(msi_cpt + 112,
    -                               &ti816x_msi_chip, handle_level_irq);
    -               }
     
                    set_irq_chained_handler(msi_irq, ti816x_msi_handler);
    -printk ("set_irq_chained_handler(%u, ti816x_msi_handler)\n", msi_irq);
            } else {
                    pr_warning(DRIVER_NAME ": MSI info not available, disabled\n");
                    msi_irq_num = 0;

    But it is still not sufficient to get MSI IRQ on a PCIe card which can enable/disable selectively each MSI IRQ, an indirection to call the right handler is missing.

  • 0 in reply to Etienne Lorrain
    TI__Expert 5685 points

    I think you have taken the reverse diff.

    But I am not sure why any of the above modification is necessary. MSI support is available since 04.00.00.12 release onwards and the arch_setup_msi_irq() would already be installing the handlers.

       Hemant.