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L138 EMIF accessing upper address lines via GPIO

Colin Koo
Prodigy 80 points

Hi

 

I would like to clarifying on one item which i find a little confusing when reading the EMIF User Guide (page 28) regarding accessing larger asynchronous memory. Below is taken from the user guide itself.

"..., then GPIO pins may be used to control the flash device's upper address lines.... The ROM bootloader assumes that any GPIO pins used to control the upper address lines of the boot flash will be pulled to 0 after reset. This means that normally the GPIO pins selected for this function will be either spare or used as outputs only by the application and therefore can be pulled to 0 at reset with an external pulldown resistor."

What i understand from here is that i could use a GPIO with an external pulldown (e.g. 10k) to configure the upper address lines. Is this correct? By the way, I'll be using GP2[8] and GP4[7] for the upper address lines.

However, i tried some experiment on my evaluation board and this was my observation. After reset, these GPIO is at logic "1". When i take a resistor (10k) to pull this pin down, i simply get a smaller voltage rather than a 0, like a potential divider. It baffles me that, if i'm to use the EMIF to access the flash, then i simply do not have any GPIO to access the upper address lines. I notice that most of the GPIOs are pull up to logic "1" by default after reset.

I'm hoping that someone can help advise me on this.

Thank you :)

  • 0
    Expert 1070 points

    Hi Colin,

    If it isn't possible for you to use GPIOs that are pulled down after reset, you should use rather lower value for external pulldown resistor to oppose the internal pullup.

    "For most systems, a 1-kΩ resistor can be used" - see L138 datasheet, section 3.3 "Pullup/Pulldown Resistors".

       Denis

  • 0 in reply to fdm
    Prodigy 80 points

    Thanks Denis :)

    i think what i can do is try to measure the IPU and then decide the best pull down to use.

  • 0 in reply to Colin Koo
    Expert 1070 points

    Colin,

    exact IPU and IPD values depend on many factors - I/O voltage, temperature, process variaton etc. Worst case values should be calculated using input current and voltage limits given in datasheet.

      Denis

  • 0 in reply to fdm
    Prodigy 80 points

    Hi Denis

    using the current and voltage limits in datasheet will get be the worst case external pullup/down resistors, but that would not tell me what is the right pulldown i need to use to overcome the IPU. Is my understanding correct? What i did was probing on the GPIO that i intend to use and see the voltage level immediately after reset (i got 3.3V). Then i short that GPIO to ground via a pulldown resistor (30kohm, 5kohm and 1kohm) and i probe the voltage on that pin again. From the result i got, i can calculate the IPU which is about 19kohm. So, 1kohm pulldown works just fine for my case. What's your thought on this? Do you think there's a better way to do it?

    by the way, thanks a lot for your feedbacks :)

     

    Colin

  • 0 in reply to Colin Koo
    TI__Guru*** 125430 points

    The better way to arrive at the numbers is by looking at Section 4.4 "Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Junction Temperature".  Specifically look at "input current" for dual-voltage LVCMOS I/Os.  The minimum current consumed is 70uA and the max is 310uA.  Those numbers represent the extremes over temperature, voltage, and process.  So 3.3V / 70uA = 47k and 3.3V / 310uA = 10.6k.  So the pullup resistance can fluctuate from 10.6k to 47k.  So if you're using a 1k pull down that means the voltage measured on the pin could range from 1k / 11.6k x 3.3V = 0.284V to 1k / 48k x 3.3V = 0.069V.  So as long as 0.284V is considered "low" by your external memory then a 1k pulldown will be guaranteed to work correctly.

  • 0 in reply to Brad Griffis
    Expert 1070 points

    Brad,

    I suppose these calculations should take into account allowable DVDD range (3.15V ... 3.45V), right?

    And what is the most adequate model for internal pullup/pulldown structures - linear (fixed) resistor or current source/sink?

       Denis

     

  • 0 in reply to fdm
    Prodigy 80 points

    Thanks guys :) these feedbacks are great :)

  • 0 in reply to fdm
    TI__Guru*** 125430 points

    fdm said:

    I suppose these calculations should take into account allowable DVDD range (3.15V ... 3.45V), right?

    Yes.

     

    fdm said:

    And what is the most adequate model for internal pullup/pulldown structures - linear (fixed) resistor or current source/sink?

    Another good point!  I believe the physical implementation is actually a current source.

     

  • 0 in reply to Brad Griffis
    Prodigy 80 points

    Hi

    We have been talking about calculating the internal pullup resistors. Is the pulldown resistors calculate the same way as well using the same current and voltage?

  • 0 in reply to Colin Koo
    Expert 1070 points

    Hi Colin,

    notice that the maximum input sink current for IPD differs from IPU source current (-270uA vs. +310uA). Also you should account for the maximum/minimum I/O supply voltage in your application (3.15V ... 3.45V in the worst case).

     Using the current source model we could obtain more conservative estimation of the external resistor required  So the external pullup to ensure the minimum Vih=2.0V when overriding the IPD is (3.15V - 2.00V) / 270uA = 4.26k and  the external pulldown for Vil(max)=0.8V  is (0.8V / 310uA) = 2.58k (add some margin for resistor tolerance, noise etc.)

      Denis

  • 0 in reply to fdm
    Prodigy 80 points

    thank you very much :) appreciate all the advices..

  • 0 in reply to Colin Koo
    Expert 2110 points

    Colin,

    In fact you can use CS3, CS4, CS5 for the extra address pin instead of GPIO pin. TBelow URL has example how to connect 1Gb NOR flash without using GPIO.

    http://processors.wiki.ti.com/index.php/Connecting_NOR_Flash_to_OMAP-L138

    And this is TI provided Schematic Review Checklist that you might want to have a look.

    http://processors.wiki.ti.com/index.php/OMAP-L13x_/_C674x_/_AM1x_Schematic_Review_Checklist

    rgds,

    kc Wong