Other Parts Discussed in Thread: TDA4VH
Hello Champs,
Customer has some questions about TDA4VH-Q1
1. Demo schematic diagram VSYS_3V3 is to power the SOC minimum system, the current output capacity is 30A (15A + 15A) At present, in the case of compatibility with the use requirements of TDA4VH, whether the current here can be designed at 3.3V/20A, the precondition: only consider the power consumption of the SOC, and the next buck considers more than 95% efficency
2. When one of MCU power supply fails, does it affect the whole SOC?
3. When loading code or ISP debugging, must it use USB3.0?
4. When not using WKUP_UART as streaming control?
5. Can EHRPWM output PWM? Can it be used for USS driver? Can Detimer output PWM?
6. Which is the dedicated pin for FSYNC? Can't find related pins on Demo board.
7. Is there power consumption for DDR Retention, IO Retention?
8. MCU and Main is isolated in hardware, it is difficulty to realize MCU-ONLY in software, will it affect the static power consumption?
Thanks
Regards
Shine